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2025
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Invention
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Integrated circuit and method of manufacturing same.
An integrated circuit includes a Schmitt tr... |
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Invention
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Method and system for reducing migration errors.
A method (of manufacturing a semiconductor devi... |
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Invention
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Method of and apparatus for controlling clock signal.
An integrated circuit includes a clocking ... |
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Invention
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Level shifter circuit and method of operating the same.
An integrated circuit includes a first r... |
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2024
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Invention
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Shared decoder circuit and method.
A memory circuit includes a control circuit configured to rec... |
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Invention
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Signal generator for controlling timing of signal in memory device.
A device includes a first me... |
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Invention
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Timing control circuit of memory device with tracking word line and tracking bit line.
A circuit... |
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Invention
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Bi-directional scan flip-flop circuit and method.
A scan flip-flop circuit includes first and se... |
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Invention
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Memory device and operating method thereof.
A memory device, comprising: a first driving circuit... |
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Invention
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Memory device.
A memory device includes a memory array, a first latch and a first logic element.... |
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Invention
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Coupling monitoring system.
A coupling including a main body, a first hub at a first end of the ... |
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Invention
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Methods of manufacturing flip-flop with transistors having different threshold voltages and semic... |
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Invention
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System, apparatus, and method for improving photoresist coating operations.
A coating system and... |
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Invention
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Multiplexer for sdfq having differently-sized scan and data transistors, semiconductor device inc... |
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Invention
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Semiconductor device.
A semiconductor device includes a connector layer; a dielectric layer over... |
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Invention
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Trench etching process for photoresist line roughness improvement.
A method of forming a semicon... |
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Invention
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Method of forming semiconductor device including daisy-chained delay cells.
A method of forming ... |
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Invention
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Integrated circuit and an operation method thereof.
An integrated circuit includes a control cir... |
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Invention
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Static random access memory with adaptive precharge signal generated in response to tracking oper... |
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Invention
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Method for forming a timing circuit arrangements for flip-flops.
An integrated circuit includes ... |
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Invention
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Signal generator for controlling timing of signal in memory device.
A device includes a memory a... |
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2023
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Invention
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Level shifter circuit and method of operating the same. An integrated circuit includes an input c... |
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Invention
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Method for optimizing floor plan for an integrated circuit.
A method is provided and includes se... |
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Invention
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Semiconductor device and manufacturing method thereof.
A method includes forming a fin structure... |
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Invention
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Memory device, write assist circuit, and method.
A memory device includes a memory cell in a fir... |
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Invention
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Integrated circuit die with memory macro including through-silicon via and method of forming the ... |
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Invention
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Method of testing an integrated circuit and testing system.
A method of testing an integrated ci... |
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Invention
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Integrated circuit device. An integrated circuit (IC) device includes at least one circuit having... |
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Invention
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Shared well structure manufacturing method. A method of manufacturing an IC structure includes co... |
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Invention
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Memory device and operating method thereof. A memory device includes a first transistor, a second... |
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Invention
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Method of and apparatus for controlling clock signal. An integrated circuit includes a clocking t... |
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Invention
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Combined function ic cell layout method and system.
A method of generating an integrated circuit... |
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Invention
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Multi-bit level shifter.
A semiconductor device includes: first and second input circuits in a c... |
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Invention
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Signal generator for controlling timing of signal in memory device. A device includes a first mem... |
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Invention
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Memory device having tracking word line with adjust circuit, method of operating same and method ... |
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Invention
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Eco base cell structure, layout method, and system.
An IC structure includes first through third... |
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Invention
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Memory structure with optimized latch clock design.
A memory device is provided and includes a m... |
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Invention
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Semiconductor device and method of operating same.
A semiconductor device having a cell region, ... |
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Invention
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Method of bubble removal from viscous fluid.
A method includes receiving, in a first vessel, a f... |
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Invention
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Memory device and operating method thereof.
A memory device is provided, including at least one ... |
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Invention
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Polishing pad conditioning system and method of using.
A method of conditioning a polishing pad ... |
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Invention
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Memory device.
A memory device is provided, including at least one inverter, a transistor couple... |
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Invention
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Static voltage drop prediction system and method.
A method is provided, including following oper... |
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Invention
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System for physical verification runtime reduction and method of using same.
A method of perform... |
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Invention
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Semiconductor device iincluding delay-enhanced inverter circuit and method of forming same.
A de... |
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Invention
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Bi-directional scan flip-flop circuit and method. A scan flip-flop circuit includes a selection c... |
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Invention
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Integrated circuit having transistors with different width source and drain terminals.
An integr... |
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2022
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Invention
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Semiconductor device with daisy-chained delay cells and method of forming same. A semiconductor d... |
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Invention
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Flip-flop with transistors having different threshold voltages, semiconductor device including sa... |
