A novel system for in-product Bias Temperature Instability (BTI) characterization that allows for characterization of transistor degradation rates is disclosed; it is self-testing and can be embedded in real products without impacting the host functionality. The test data collected during product chip testing (at Electrical Wafer Sort) can be used for identification of abnormal material and for material disposition, or to predict the chip aging rate and premature failure risk due to BTI degradation. The system can also collect the data from the real time device aging in the field, during the host chip operational lifetime. The system is equipped with local programmable power supply generation and self-test capabilities to allow concurrent operations with the host application. The Devices Under Test (DUTs) consist of standard cell-based Ring Oscillators (ROs) which have the unique capability of decoupling the BTI effects on N-type and P-type MOSFET transistors. New switching circuitry is implemented that provides for minimal delay between the stress and measurement phases, thus giving the system the capability of fully characterizing the BTI relaxation dynamic.
G01R 31/26 - Test de dispositifs individuels à semi-conducteurs
G01R 19/00 - Dispositions pour procéder aux mesures de courant ou de tension ou pour en indiquer l'existence ou le signe
G01R 31/27 - Test de dispositifs sans les extraire physiquement du circuit dont ils font partie, p. ex. compensation des effets dus aux éléments environnants
G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux
G01R 31/52 - Test pour déceler la présence de courts-circuits, de fuites de courant ou de défauts à la terre
Wafer quality is determined by modeling equipment history as a sequence of events, then evaluating anomalous results for individual events. Identifying an event that generates bad wafers narrows the list of possible root causes.
G05B 19/18 - Commande numérique [CN], c.-à-d. machines fonctionnant automatiquement, en particulier machines-outils, p. ex. dans un milieu de fabrication industriel, afin d'effectuer un positionnement, un mouvement ou des actions coordonnées au moyen de données d'un programme sous forme numérique
G05B 19/406 - Commande numérique [CN], c.-à-d. machines fonctionnant automatiquement, en particulier machines-outils, p. ex. dans un milieu de fabrication industriel, afin d'effectuer un positionnement, un mouvement ou des actions coordonnées au moyen de données d'un programme sous forme numérique caractérisée par le contrôle ou la sécurité
3.
USE OF LAYOUT ANALYSIS TO ENABLE EFFICIENT AND EFFECTIVE RANDOM DEFECT INSPECTION USING A VECTOR-MODE E-BEAM INSPECTION MACHINE
A vector e-beam machine for random defect inspection is disclosed. Contrary to traditional wisdom, it is shown that through a careful choice of target locations, vector machines can provide high-throughput and high coverage even when scanning for random defects. Additionally, by not wastefully scanning locations that provide no additional fault observability, charge accumulation on the wafer—a major concern in e-beam scanning—is reduced.
A vector e-beam machine for random defect inspection is disclosed. Contrary to traditional wisdom, it is shown that through a careful choice of target locations, vector machines can provide high-throughput and high coverage even when scanning for random defects. Additionally, by not wastefully scanning locations that provide no additional fault observability, charge accumulation on the wafer—a major concern in e-beam scanning—is reduced.
In a preferred embodiment, two approaches are combined:
1) Scan/target only at locations where a random failure can be observed.
2) From the defined list of observable locations, scan/target only the points which have the highest efficiency.
A vector e-beam machine for random defect inspection is disclosed. Contrary to traditional wisdom, it is shown that through a careful choice of target locations, vector machines can provide high-throughput and high coverage even when scanning for random defects. Additionally, by not wastefully scanning locations that provide no additional fault observability, charge accumulation on the wafer—a major concern in e-beam scanning—is reduced.
In a preferred embodiment, two approaches are combined:
1) Scan/target only at locations where a random failure can be observed.
2) From the defined list of observable locations, scan/target only the points which have the highest efficiency.
Use of these and/or other disclosed techniques enables the scanner to target and evaluate a majority of the total observable defects in a single pass.
A predictive model for equipment fail modes. An anomaly is detected in a collection of trace data, then key features are calculated. A search is conducted for the same or similar anomalies having the same key features in a database of past trace data. If the same anomaly occurred before and is in the database, then the type of anomaly, its root cause, and action steps to correct can be retrieved from the database.
G06F 11/07 - Réaction à l'apparition d'un défaut, p. ex. tolérance de certains défauts
5.
SYSTEMS, DEVICES, AND METHODS FOR PERFORMING A NON-CONTACT ELECTRICAL MEASUREMENT ON A CELL, NON-CONTACT ELECTRICAL MEASUREMENT CELL VEHICLE, CHIP, WAFER, DIE, OR LOGIC BLOCK
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
09 - Appareils et instruments scientifiques et électriques
37 - Services de construction; extraction minière; installation et réparation
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Downloadable and recorded computer software and hardware for
use in semiconductor design and manufacturing; downloadable
and recorded computer software and hardware for
semiconductor integrated circuit design for use in
semiconductor design, manufacturing, and testing;
downloadable and recorded computer software and hardware for
semiconductor design for use in tracking devices during the
semiconductor design, manufacturing, assembly, and testing;
downloadable and recorded computer software and hardware
providing automated characterization and analysis of test
chip and structures and cell library layouts in the field of
semiconductor manufacturing; downloadable and recorded
software for managing equipment sensor data, equipment
control, and data analytics of semiconductor design and
manufacturing processes; downloadable and recorded software
for managing equipment sensor data, equipment controls and
data analytics of electronics design and manufacturing
processes; downloadable and recorded computer software and
hardware using analytics of semiconductor design
manufacturing execution systems data to increase
efficiencies in the manufacture of semiconductors;
downloadable and recorded computer software and hardware
using analytics of semiconductor design consumable parts and
materials data to decrease costs in the manufacture of
semiconductors; downloadable and recorded computer programs
using artificial intelligence and machine learning for use
in semiconductor design, manufacturing, assembly, and
testing, to improve yields and increase efficiencies in the
manufacture of semiconductors; downloadable software for
development of machine learning and deep learning
algorithms, pattern recognition, and modeling technologies
for use in the field of semiconductor design, test and
manufacturing; electrical measurement computer hardware for
use in the field of semiconductor manufacturing;
traceability computer hardware for use in the field of
semiconductor manufacturing device tracking; test equipment,
namely, electronic sensors for testing electronic circuits
and devices; test structures and test chips, namely,
semiconductor test chips; downloadable and recorded computer
software for semiconductor test data analytics; downloadable
and recorded computer software for use in operating
semiconductor testing machines; downloadable and recorded
computer software for driving or enabling semiconductor
devices and signal processors, or extending their
functionality; integrated circuit modules for electronic
data transfer and wireless communication. Installation and maintenance of computer hardware and
hardware systems; technical support services, namely,
troubleshooting in the nature of repair of computer
hardware. Consulting, engineering, design and testing services in the
field of the manufacture of semiconductors and for yield and
performance improvement in the manufacture of
semiconductors; analysis of technical data in the field of
the manufacture of semiconductors and for yield and
performance improvement in the manufacture of
semiconductors; testing of semiconductors for quality
control purposes; design of semiconductor test chips for
others; product design and development services in the field
of providing enhancements to hardware and software for
manufacturing of semiconductors; providing technical support
and consulting services, namely, troubleshooting in the
nature of diagnosing computer hardware problems by providing
design solutions in the field of integrated circuits and
signal processing; providing technical information via
temporary use of non-downloadable software for displaying
models in the field of integrated circuits and signal
processing solutions; providing temporary use of
non-downloadable software for evaluating analog design
circuitry, calibrating analog design circuitry, and driving
analog design circuitry, featuring an online reference
design library, circuit notes, and evaluation software code
sets for IC design; cloud computing featuring software for
processing data in the field of semiconductor design, test
and manufacturing; providing temporary use of
non-downloadable software for providing simulation, modeling
and design tools for analog and mixed signal IC design;
rental and leasing of computer hardware and computer
peripherals; technical support services, namely,
troubleshooting of computer software problems; technical
support services, namely, troubleshooting in the nature of
diagnosing computer hardware and software problems; computer
hosting services, namely, providing computer hardware,
computer software, computer peripherals to others on a
subscription or pay-per-use basis; providing virtual
computer systems and virtual computer environments through
cloud computing; providing on-line non-downloadable software
using artificial intelligence for use in machine learning
and data analysis in the field of semiconductor design, test
and manufacturing; application service provider (ASP)
featuring software using artificial intelligence for use in
machine learning and data analysis in the field of
semiconductor design, test and manufacturing; software as a
service (SaaS) services featuring software for use in
machine learning in the field of semiconductor design, test
and manufacturing; software as a service (SaaS) services
featuring software that utilizes machine learning algorithms
to discover patterns and perform analytics for use in
machine learning in the field of semiconductor design, test
and manufacturing; software as a service (SaaS) featuring
cloud-based metrics and analytic algorithms for use in
manufacturing processes, namely, for yield and performance
improvement in the manufacture of semiconductors; software
as a service (SaaS) services featuring software for sharing
large and dimensional datasets for enterprise clients for
the purpose of delivering automated data modeling, machine
learning, predictive analytics, automated reasoning,
diagnostics, optimization and recommendation services;
software as a service (SaaS) services featuring software for
use in developing, executing, monitoring, managing, and
optimizing algorithms, business processes, and analytics in
the fields of semiconductor design, test, process control,
assembly and manufacturing; software as a service (SaaS)
services, namely, hosting software for use by others for use
in store, query, and sharing functionality for management of
high dimensional big data sets, machine learning algorithms,
and predictive models; providing temporary use of on-line
non-downloadable software and applications using artificial
intelligence for use in machine learning and data analysis
in the field of semiconductor design, test, process control,
assembly and manufacturing; providing temporary use of
on-line non-downloadable cloud computing software using
artificial intelligence for use in machine learning and data
analysis in the field of semiconductor design, test, process
control, assembly and manufacturing; configuration,
installation and maintenance of computer software.
09 - Appareils et instruments scientifiques et électriques
37 - Services de construction; extraction minière; installation et réparation
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Downloadable and recorded computer software and hardware for
use in semiconductor design and manufacturing; downloadable
and recorded computer software and hardware for
semiconductor integrated circuit design for use in
semiconductor design, manufacturing, and testing;
downloadable and recorded computer software and hardware for
semiconductor design for use in tracking devices during the
semiconductor design, manufacturing, assembly, and testing;
downloadable and recorded computer software and hardware
providing automated characterization and analysis of test
chip and structures and cell library layouts in the field of
semiconductor manufacturing; downloadable and recorded
software for managing equipment sensor data, equipment
control, and data analytics of semiconductor design and
manufacturing processes; downloadable and recorded software
for managing equipment sensor data, equipment controls and
data analytics of electronics design and manufacturing
processes; downloadable and recorded computer software and
hardware using analytics of semiconductor design
manufacturing execution systems data to increase
efficiencies in the manufacture of semiconductors;
downloadable and recorded computer software and hardware
using analytics of semiconductor design consumable parts and
materials data to decrease costs in the manufacture of
semiconductors; downloadable and recorded computer programs
using artificial intelligence and machine learning for use
in semiconductor design, manufacturing, assembly, and
testing, to improve yields and increase efficiencies in the
manufacture of semiconductors; downloadable software for
development of machine learning and deep learning
algorithms, pattern recognition, and modeling technologies
for use in the field of semiconductor design, test and
manufacturing; electrical measurement computer hardware for
use in the field of semiconductor manufacturing;
traceability computer hardware for use in the field of
semiconductor manufacturing device tracking; test equipment,
namely, electronic sensors for testing electronic circuits
and devices; test structures and test chips, namely,
semiconductor test chips; downloadable and recorded computer
software for semiconductor test data analytics; downloadable
and recorded computer software for use in operating
semiconductor testing machines; downloadable and recorded
computer software for driving or enabling semiconductor
devices and signal processors, or extending their
functionality; integrated circuit modules for electronic
data transfer and wireless communication. Installation and maintenance of computer hardware and
hardware systems; technical support services, namely,
troubleshooting in the nature of repair of computer
hardware. Consulting, engineering, design and testing services in the
field of the manufacture of semiconductors and for yield and
performance improvement in the manufacture of
semiconductors; analysis of technical data in the field of
the manufacture of semiconductors and for yield and
performance improvement in the manufacture of
semiconductors; testing of semiconductors for quality
control purposes; design of semiconductor test chips for
others; product design and development services in the field
of providing enhancements to hardware and software for
manufacturing of semiconductors; providing technical support
and consulting services, namely, troubleshooting in the
nature of diagnosing computer hardware problems by providing
design solutions in the field of integrated circuits and
signal processing; providing technical information via
temporary use of non-downloadable software for displaying
models in the field of integrated circuits and signal
processing solutions; providing temporary use of
non-downloadable software for evaluating analog design
circuitry, calibrating analog design circuitry, and driving
analog design circuitry, featuring an online reference
design library, circuit notes, and evaluation software code
sets for IC design; cloud computing featuring software for
processing data in the field of semiconductor design, test
and manufacturing; providing temporary use of
non-downloadable software for providing simulation, modeling
and design tools for analog and mixed signal IC design;
rental and leasing of computer hardware and computer
peripherals; technical support services, namely,
troubleshooting of computer software problems; technical
support services, namely, troubleshooting in the nature of
diagnosing computer hardware and software problems; computer
hosting services, namely, providing computer hardware,
computer software, computer peripherals to others on a
subscription or pay-per-use basis; providing virtual
computer systems and virtual computer environments through
cloud computing; providing on-line non-downloadable software
using artificial intelligence for use in machine learning
and data analysis in the field of semiconductor design, test
and manufacturing; application service provider (ASP)
featuring software using artificial intelligence for use in
machine learning and data analysis in the field of
semiconductor design, test and manufacturing; software as a
service (SaaS) services featuring software for use in
machine learning in the field of semiconductor design, test
and manufacturing; software as a service (SaaS) services
featuring software that utilizes machine learning algorithms
to discover patterns and perform analytics for use in
machine learning in the field of semiconductor design, test
and manufacturing; software as a service (SaaS) featuring
cloud-based metrics and analytic algorithms for use in
manufacturing processes, namely, for yield and performance
improvement in the manufacture of semiconductors; software
as a service (SaaS) services featuring software for sharing
large and dimensional datasets for enterprise clients for
the purpose of delivering automated data modeling, machine
learning, predictive analytics, automated reasoning,
diagnostics, optimization and recommendation services;
software as a service (SaaS) services featuring software for
use in developing, executing, monitoring, managing, and
optimizing algorithms, business processes, and analytics in
the fields of semiconductor design, test, process control,
assembly and manufacturing; software as a service (SaaS)
services, namely, hosting software for use by others for use
in store, query, and sharing functionality for management of
high dimensional big data sets, machine learning algorithms,
and predictive models; providing temporary use of on-line
non-downloadable software and applications using artificial
intelligence for use in machine learning and data analysis
in the field of semiconductor design, test, process control,
assembly and manufacturing; providing temporary use of
on-line non-downloadable cloud computing software using
artificial intelligence for use in machine learning and data
analysis in the field of semiconductor design, test, process
control, assembly and manufacturing; configuration,
installation and maintenance of computer software.
8.
SYSTEMS, DEVICES, AND METHODS FOR ALIGNING A PARTICLE BEAM AND PERFORMING A NON-CONTACT ELECTRICAL MEASUREMENT ON A CELL AND/OR NON-CONTACT ELECTRICAL MEASUREMENT CELL VEHICLE USING A REGISTRATION CELL
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
H01J 37/317 - Tubes à faisceau électronique ou ionique destinés aux traitements localisés d'objets pour modifier les propriétés des objets ou pour leur appliquer des revêtements en couche mince, p. ex. implantation d'ions
Detection of data anomalies resulting from maintenance activities on semiconductor processing equipment. Time-series representation of the key indicators for equipment performance is cleaned then segmented according to sharp breaks in the data. The cleaned and segmented data is modeled, for example, by determining a linear fit for each segment. The slope and intercept of each modeled segment linear fit are compared and evaluated to identify anomalies in the data.
Detection of data anomalies resulting from maintenance activities on semiconductor processing equipment. Time-series representation of the key indicators for equipment performance is cleaned then segmented according to sharp breaks in the data. The cleaned and segmented data is modeled, for example, by determining a linear fit for each segment. The slope and intercept of each modeled segment linear fit are compared and evaluated to identify anomalies in the data.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
G01R 31/00 - Dispositions pour tester les propriétés électriquesDispositions pour la localisation des pannes électriquesDispositions pour tests électriques caractérisées par ce qui est testé, non prévues ailleurs
A method of evaluating the microstructure of a surface, such as a coating on a substrate. The surface is illuminated using at least one light source. One or more images of the illuminated surface are captured. The captured images are processed to identify one or more features of the microstructure, and then determine one or more parameters of the microstructure features. The parameters are compared to thresholds or limits to determine whether remedial action is needed.
A method of evaluating the microstructure of a surface, such as a coating on a substrate. The surface is illuminated using at least one light source. One or more images of the illuminated surface are captured. The captured images are processed to identify one or more features of the microstructure, and then determine one or more parameters of the microstructure features. The parameters are compared to thresholds or limits to determine whether remedial action is needed.
A template for assigning the most probable root causes for wafer defects. The bin map data for a subject wafer can be compared with bin map data for prior wafers to find wafers with similar issues. A probability can be determined as to whether the same root cause should be applied to the subject wafer, and if so, the wafer can be labeled with that root cause accordingly.
Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic block
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cell
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
G01R 31/306 - Test sans contact utilisant des faisceaux électroniques de circuits imprimés ou hybrides
H01J 37/317 - Tubes à faisceau électronique ou ionique destinés aux traitements localisés d'objets pour modifier les propriétés des objets ou pour leur appliquer des revêtements en couche mince, p. ex. implantation d'ions
09 - Appareils et instruments scientifiques et électriques
37 - Services de construction; extraction minière; installation et réparation
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Downloadable and recorded computer software and hardware for use in semiconductor design and manufacturing; Downloadable and recorded computer software and hardware for semiconductor integrated circuit design for use in semiconductor design, manufacturing, and testing; Downloadable and recorded computer software and hardware for semiconductor design for use in tracking devices during the semiconductor design, manufacturing, assembly, and testing; Downloadable and recorded computer software and hardware providing automated characterization and analysis of test chip and structures and cell library layouts in the field of semiconductor manufacturing; Downloadable and recorded software for managing equipment sensor data, equipment control, and data analytics of semiconductor design and manufacturing processes; Downloadable and recorded software for managing equipment sensor data, equipment controls and data analytics of electronics design and manufacturing processes; Downloadable and recorded computer software and hardware using analytics of semiconductor design manufacturing execution systems data to increase efficiencies in the manufacture of semiconductors; Downloadable and recorded computer software and hardware using analytics of semiconductor design consumable parts and materials data to decrease costs in the manufacture of semiconductors; Downloadable and recorded computer programs using artificial intelligence and machine learning for use in semiconductor design, manufacturing, assembly, and testing, to improve yields and increase efficiencies in the manufacture of semiconductors; Downloadable software for development of machine learning and deep learning algorithms, pattern recognition, and modeling technologies for use in the field of semiconductor design, test and manufacturing; Electrical measurement computer hardware for use in the field of semiconductor manufacturing; Traceability computer hardware for use in the field of semiconductor manufacturing device tracking; Test equipment, namely, electronic sensors for testing electronic circuits and devices; Test structures and test chips, namely, semiconductor test chips; Downloadable and recorded computer software for semiconductor test data analytics; Downloadable and recorded computer software for use in operating semiconductor testing machines; Downloadable and recorded computer software for driving or enabling semiconductor devices and signal processors, or extending their functionality; Integrated circuit modules for electronic data transfer and wireless communication. Configuration, installation, and maintenance of computer hardware and computer hardware systems; technical support services, namely troubleshooting in the nature of repair of computer hardware. Consulting, engineering, design and testing services in the field of the manufacture of semiconductors and for yield and performance improvement in the manufacture of semiconductors; Analysis of technical data in the field of the manufacture of semiconductors and for yield and performance improvement in the manufacture of semiconductors; Testing of semiconductors for quality control purposes; Design of semiconductor test chips for others; Product design and development services in the field of providing enhancements to hardware and software for manufacturing of semiconductors; Providing technical support and consulting services, namely, troubleshooting in the nature of diagnosing computer hardware problems by providing design solutions in the field of integrated circuits and signal processing; Providing technical information via temporary use of non-downloadable software for displaying models in the field of integrated circuits and signal processing solutions; Providing temporary use of non-downloadable software for evaluating analog design circuitry, calibrating analog design circuitry, and driving analog design circuitry, featuring an online reference design library, circuit notes, and evaluation software code sets for IC design; Providing temporary use of non-downloadable software for providing simulation, modeling and design tools for analog and mixed signal IC design; Rental and leasing of computer hardware and computer peripherals; Providing on-line non-downloadable software using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test and manufacturing; Software as a service (SaaS) services, namely, hosting software for use by others for use in store, query, and sharing functionality for management of high dimensional big data sets, machine learning algorithms, and predictive models; Providing temporary use of on-line non-downloadable software and applications using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test, process control, assembly and manufacturing; Providing temporary use of on-line non-downloadable cloud computing software using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test, process control, assembly and manufacturing.
09 - Appareils et instruments scientifiques et électriques
37 - Services de construction; extraction minière; installation et réparation
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Downloadable and recorded computer software and hardware for use in semiconductor design and manufacturing; Downloadable and recorded computer software and hardware for semiconductor integrated circuit design for use in semiconductor design, manufacturing, and testing; Downloadable and recorded computer software and hardware for semiconductor design for use in tracking devices during the semiconductor design, manufacturing, assembly, and testing; Downloadable and recorded computer software and hardware providing automated characterization and analysis of test chip and structures and cell library layouts in the field of semiconductor manufacturing; Downloadable and recorded software for managing equipment sensor data, equipment control, and data analytics of semiconductor design and manufacturing processes; Downloadable and recorded software for managing equipment sensor data, equipment controls and data analytics of electronics design and manufacturing processes; Downloadable and recorded computer software and hardware using analytics of semiconductor design manufacturing execution systems data to increase efficiencies in the manufacture of semiconductors; Downloadable and recorded computer software and hardware using analytics of semiconductor design consumable parts and materials data to decrease costs in the manufacture of semiconductors; Downloadable and recorded computer programs using artificial intelligence and machine learning for use in semiconductor design, manufacturing, assembly, and testing, to improve yields and increase efficiencies in the manufacture of semiconductors; Downloadable software for development of machine learning and deep learning algorithms, pattern recognition, and modeling technologies for use in the field of semiconductor design, test and manufacturing; Electrical measurement computer hardware for use in the field of semiconductor manufacturing; Traceability computer hardware for use in the field of semiconductor manufacturing device tracking; Test equipment, namely, electronic sensors for testing electronic circuits and devices; Test structures and test chips, namely, semiconductor test chips; Downloadable and recorded computer software for semiconductor test data analytics; Downloadable and recorded computer software for use in operating semiconductor testing machines; Downloadable and recorded computer software for driving or enabling semiconductor devices and signal processors, or extending their functionality; Integrated circuit modules for electronic data transfer and wireless communication Installation and maintenance of computer hardware and hardware systems; technical support services, namely, troubleshooting in the nature of repair of computer hardware Consulting, engineering, design and testing services in the field of the manufacture of semiconductors and for yield and performance improvement in the manufacture of semiconductors; Analysis of technical data in the field of the manufacture of semiconductors and for yield and performance improvement in the manufacture of semiconductors; Testing of semiconductors for quality control purposes; Design of semiconductor test chips for others; Product design and development services in the field of providing enhancements to hardware and software for manufacturing of semiconductors; Providing technical support and consulting services, namely, troubleshooting in the nature of diagnosing computer hardware problems by providing design solutions in the field of integrated circuits and signal processing; Providing technical information via temporary use of non-downloadable software for displaying models in the field of integrated circuits and signal processing solutions; Providing temporary use of non-downloadable software for evaluating analog design circuitry, calibrating analog design circuitry, and driving analog design circuitry, featuring an online reference design library, circuit notes, and evaluation software code sets for IC design; Cloud computing featuring software for processing data in the field of semiconductor design, test and manufacturing; Providing temporary use of non-downloadable software for providing simulation, modeling and design tools for analog and mixed signal IC design; Rental and leasing of computer hardware and computer peripherals; Technical support services, namely, troubleshooting of computer software problems; Technical support services, namely, troubleshooting in the nature of diagnosing computer hardware and software problems; Computer hosting services, namely, providing computer hardware, computer software, computer peripherals to others on a subscription or pay-per-use basis; providing virtual computer systems and virtual computer environments through cloud computing; Providing on-line non-downloadable software using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test and manufacturing; Application service provider (ASP) featuring software using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test and manufacturing; Software as a service (SaaS) services featuring software for use in machine learning in the field of semiconductor design, test and manufacturing; Software as a Service (SaaS) services featuring software that utilizes machine learning algorithms to discover patterns and perform analytics for use in machine learning in the field of semiconductor design, test and manufacturing; Software as a Service (SaaS) featuring cloud-based metrics and analytic algorithms for use in manufacturing processes, namely, for yield and performance improvement in the manufacture of semiconductors; Software as a service (SaaS) services featuring software for sharing large and dimensional datasets for enterprise clients for the purpose of delivering automated data modeling, machine learning, predictive analytics, automated reasoning, diagnostics, optimization and recommendation services; Software as a service (SaaS) services featuring software for use in developing, executing, monitoring, managing, and optimizing algorithms, business processes, and analytics in the fields of semiconductor design, test, process control, assembly and manufacturing; Software as a service (SaaS) services, namely, hosting software for use by others for use in store, query, and sharing functionality for management of high dimensional big data sets, machine learning algorithms, and predictive models; Providing temporary use of on-line non-downloadable software and applications using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test, process control, assembly and manufacturing; Providing temporary use of on-line non-downloadable cloud computing software using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test, process control, assembly and manufacturing; Configuration of computer hardware and computer software and hardware systems; Installation, maintenance and repair of software for computer systems; Maintenance of computer software
09 - Appareils et instruments scientifiques et électriques
37 - Services de construction; extraction minière; installation et réparation
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Downloadable and recorded computer software and hardware for use in semiconductor design and manufacturing; Downloadable and recorded computer software and hardware for semiconductor integrated circuit design for use in semiconductor design, manufacturing, and testing; Downloadable and recorded computer software and hardware for semiconductor design for use in tracking devices during the semiconductor design, manufacturing, assembly, and testing; Downloadable and recorded computer software and hardware providing automated characterization and analysis of test chip and structures and cell library layouts in the field of semiconductor manufacturing; Downloadable and recorded software for managing equipment sensor data, equipment control, and data analytics of semiconductor design and manufacturing processes; Downloadable and recorded software for managing equipment sensor data, equipment controls and data analytics of electronics design and manufacturing processes; Downloadable and recorded computer software and hardware using analytics of semiconductor design manufacturing execution systems data to increase efficiencies in the manufacture of semiconductors; Downloadable and recorded computer software and hardware using analytics of semiconductor design consumable parts and materials data to decrease costs in the manufacture of semiconductors; Downloadable and recorded computer programs using artificial intelligence and machine learning for use in semiconductor design, manufacturing, assembly, and testing, to improve yields and increase efficiencies in the manufacture of semiconductors; Downloadable software for development of machine learning and deep learning algorithms, pattern recognition, and modeling technologies for use in the field of semiconductor design, test and manufacturing; Electrical measurement computer hardware for use in the field of semiconductor manufacturing; Traceability computer hardware for use in the field of semiconductor manufacturing device tracking; Test equipment, namely, electronic sensors for testing electronic circuits and devices; Test structures and test chips, namely, semiconductor test chips; Downloadable and recorded computer software for semiconductor test data analytics; Downloadable and recorded computer software for use in operating semiconductor testing machines; Downloadable and recorded computer software for driving or enabling semiconductor devices and signal processors, or extending their functionality; Integrated circuit modules for electronic data transfer and wireless communication Installation and maintenance of computer hardware and hardware systems; technical support services, namely, troubleshooting in the nature of repair of computer hardware Consulting, engineering, design and testing services in the field of the manufacture of semiconductors and for yield and performance improvement in the manufacture of semiconductors; Analysis of technical data in the field of the manufacture of semiconductors and for yield and performance improvement in the manufacture of semiconductors; Testing of semiconductors for quality control purposes; Design of semiconductor test chips for others; Product design and development services in the field of providing enhancements to hardware and software for manufacturing of semiconductors; Providing technical support and consulting services, namely, troubleshooting in the nature of diagnosing computer hardware problems by providing design solutions in the field of integrated circuits and signal processing; Providing technical information via temporary use of non-downloadable software for displaying models in the field of integrated circuits and signal processing solutions; Providing temporary use of non-downloadable software for evaluating analog design circuitry, calibrating analog design circuitry, and driving analog design circuitry, featuring an online reference design library, circuit notes, and evaluation software code sets for IC design; Cloud computing featuring software for processing data in the field of semiconductor design, test and manufacturing; Providing temporary use of non-downloadable software for providing simulation, modeling and design tools for analog and mixed signal IC design; Rental and leasing of computer hardware and computer peripherals; Technical support services, namely, troubleshooting of computer software problems; Technical support services, namely, troubleshooting in the nature of diagnosing computer hardware and software problems; Computer hosting services, namely, providing computer hardware, computer software, computer peripherals to others on a subscription or pay-per-use basis; providing virtual computer systems and virtual computer environments through cloud computing; Providing on-line non-downloadable software using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test and manufacturing; Application service provider (ASP) featuring software using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test and manufacturing; Software as a service (SaaS) services featuring software for use in machine learning in the field of semiconductor design, test and manufacturing; Software as a Service (SaaS) services featuring software that utilizes machine learning algorithms to discover patterns and perform analytics for use in machine learning in the field of semiconductor design, test and manufacturing; Software as a Service (SaaS) featuring cloud-based metrics and analytic algorithms for use in manufacturing processes, namely, for yield and performance improvement in the manufacture of semiconductors; Software as a service (SaaS) services featuring software for sharing large and dimensional datasets for enterprise clients for the purpose of delivering automated data modeling, machine learning, predictive analytics, automated reasoning, diagnostics, optimization and recommendation services; Software as a service (SaaS) services featuring software for use in developing, executing, monitoring, managing, and optimizing algorithms, business processes, and analytics in the fields of semiconductor design, test, process control, assembly and manufacturing; Software as a service (SaaS) services, namely, hosting software for use by others for use in store, query, and sharing functionality for management of high dimensional big data sets, machine learning algorithms, and predictive models; Providing temporary use of on-line non-downloadable software and applications using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test, process control, assembly and manufacturing; Providing temporary use of on-line non-downloadable cloud computing software using artificial intelligence for use in machine learning and data analysis in the field of semiconductor design, test, process control, assembly and manufacturing; Configuration of computer hardware and computer software and hardware systems; Installation, maintenance and repair of software for computer systems; Maintenance of computer software
19.
Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic block
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
Wafer quality is determined by modeling equipment history as a sequence of events, then evaluating anomalous results for individual events. Identifying an event that generates bad wafers narrows the list of possible root causes.
G05B 19/18 - Commande numérique [CN], c.-à-d. machines fonctionnant automatiquement, en particulier machines-outils, p. ex. dans un milieu de fabrication industriel, afin d'effectuer un positionnement, un mouvement ou des actions coordonnées au moyen de données d'un programme sous forme numérique
G05B 19/406 - Commande numérique [CN], c.-à-d. machines fonctionnant automatiquement, en particulier machines-outils, p. ex. dans un milieu de fabrication industriel, afin d'effectuer un positionnement, un mouvement ou des actions coordonnées au moyen de données d'un programme sous forme numérique caractérisée par le contrôle ou la sécurité
21.
SEQUENCED APPROACH FOR DETERMINING WAFER PATH QUALITY
Wafer quality is determined by modeling equipment history as a sequence of events, then evaluating anomalous results for individual events. Identifying an event that generates bad wafers narrows the list of possible root causes.
G06F 19/00 - Équipement ou méthodes de traitement de données ou de calcul numérique, spécialement adaptés à des applications spécifiques (spécialement adaptés à des fonctions spécifiques G06F 17/00;systèmes ou méthodes de traitement de données spécialement adaptés à des fins administratives, commerciales, financières, de gestion, de surveillance ou de prévision G06Q;informatique médicale G16H)
22.
Pattern-enhanced spatial correlation of test structures to die level responses
Enhancement of less dominant patterns for parametric wafer measurements. Dominant patterns are removed from the parametric pattern thereby revealing a less dominant pattern. The less dominant patterns can be used to identify root causes for yield loss that are not visible in the original parametric measurements.
Enhancement of less dominant patterns for parametric wafer measurements. Dominant patterns are removed from the parametric pattern thereby revealing a less dominant pattern. The less dominant patterns can be used to identify root causes for yield loss that are not visible in the original parametric measurements.
G01B 5/28 - Dispositions pour la mesure caractérisées par l'utilisation de techniques mécaniques pour mesurer la rugosité ou l'irrégularité des surfaces
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
A predictive model for equipment fail modes. An anomaly is detected in a collection of trace data, then key features are calculated. A search is conducted for the same or similar anomalies having the same key features in a database of past trace data. If the same anomaly occurred before and is in the database, then the type of anomaly, its root cause, and action steps to correct can be retrieved from the database.
A predictive model for equipment fail modes. An anomaly is detected in a collection of trace data, then key features are calculated. A search is conducted for the same or similar anomalies having the same key features in a database of past trace data. If the same anomaly occurred before and is in the database, then the type of anomaly, its root cause, and action steps to correct can be retrieved from the database.
Automatic definition of windows for trace analysis. For each process step, the trace data are aligned to both the start of the process step and the end of the process step, and statistics including rate of change are calculated from both the start of the process step and the end of the process step. Windows are generated based on analysis of the calculated statistics.
Automatic definition of windows for trace analysis. For each process step, the trace data are aligned to both the start of the process step and the end of the process step, and statistics including rate of change are calculated from both the start of the process step and the end of the process step. Windows are generated based on analysis of the calculated statistics.
A template for assigning the most probable root causes for wafer defects. The bin map data for a subject wafer can be compared with bin map data for prior wafers to find wafers with similar issues. A probability can be determined as to whether the same root cause should be applied to the subject wafer, and if so, the wafer can be labeled with that root cause accordingly.
G01N 31/00 - Recherche ou analyse des matériaux non biologiques par l'emploi des procédés chimiques spécifiés dans les sous-groupesAppareils spécialement adaptés à de tels procédés
G01F 19/00 - Récipients de mesure calibrés pour des fluides ou des matériaux solides fluents, p. ex. bechers gradués
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
A template for assigning the most probable root causes for wafer defects. The bin map data for a subject wafer can be compared with bin map data for prior wafers to find wafers with similar issues. A probability can be determined as to whether the same root cause should be applied to the subject wafer, and if so, the wafer can be labeled with that root cause accordingly.
A semiconductor image classifier. Convolution functions are applied to modify the wafer images in order to extract key information about the image. The modified images are condensed then processed through a series of pairwise classifiers, each classifier configured to determine that the image is more like one of the pair than the other. Probabilities from each classifier are collected to form a prediction for each image.
G06K 9/62 - Méthodes ou dispositions pour la reconnaissance utilisant des moyens électroniques
G06F 18/2415 - Techniques de classification relatives au modèle de classification, p. ex. approches paramétriques ou non paramétriques basées sur des modèles paramétriques ou probabilistes, p. ex. basées sur un rapport de vraisemblance ou un taux de faux positifs par rapport à un taux de faux négatifs
G06V 10/44 - Extraction de caractéristiques locales par analyse des parties du motif, p. ex. par détection d’arêtes, de contours, de boucles, d’angles, de barres ou d’intersectionsAnalyse de connectivité, p. ex. de composantes connectées
G06V 10/764 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant la classification, p. ex. des objets vidéo
G06V 10/82 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant les réseaux neuronaux
A semiconductor image classifier. Convolution functions are applied to modify the wafer images in order to extract key information about the image. The modified images are condensed then processed through a series of pairwise classifiers, each classifier configured to determine that the image is more like one of the pair than the other. Probabilities from each classifier are collected to form a prediction for each image.
Semiconductor yield is modeled at the die level to predict die that are susceptible to early lifetime failure (ELF). A first die yield calculation is made from parametric data obtained from wafer testing in a semiconductor manufacturing process. A second die yield calculation is made from die location only. The difference between the first die yield calculation and the second die yield calculation is a prediction delta. Based on an evaluation of the first die yield calculation and the prediction delta, the likelihood of early lifetime failure can be identified and an acceptable level of die loss can be established to remove die from further processing.
Semiconductor yield is modeled at the die level to predict die that are susceptible to early lifetime failure (ELF). A first die yield calculation is made from parametric data obtained from wafer testing in a semiconductor manufacturing process. A second die yield calculation is made from die location only. The difference between the first die yield calculation and the second die yield calculation is a prediction delta. Based on an evaluation of the first die yield calculation and the prediction delta, the likelihood of early lifetime failure can be identified and an acceptable level of die loss can be established to remove die from further processing.
G06F 30/27 - Optimisation, vérification ou simulation de l’objet conçu utilisant l’apprentissage automatique, p. ex. l’intelligence artificielle, les réseaux neuronaux, les machines à support de vecteur [MSV] ou l’apprentissage d’un modèle
G06F 119/02 - Analyse de fiabilité ou optimisation de fiabilitéAnalyse de défaillance, p. ex. performance dans le pire scénario, analyse du mode de défaillance et de ses effets [FMEA]
G06F 119/22 - Analyse de rendement ou optimisation de rendement
34.
IC with test structures and e-beam pads embedded within a contiguous standard cell area
An IC that includes a contiguous standard cell area with a 4x3 e-beam pad that is compatible with advanced manufacturing processes and an associated e-beam testable structure.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 21/3213 - Gravure physique ou chimique des couches, p. ex. pour produire une couche avec une configuration donnée à partir d'une couche étendue déposée au préalable
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01J 37/26 - Microscopes électroniques ou ioniquesTubes à diffraction d'électrons ou d'ions
H03K 19/0944 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs à semi-conducteurs utilisant des transistors à effet de champ utilisant des transistors MOSFET
G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux
G06F 30/39 - Conception de circuits au niveau physique
35.
IC with test structures and e-beam pads embedded within a contiguous standard cell area
An IC that includes a contiguous standard cell area with a 4×3 e-beam pad that is compatible with advanced manufacturing processes and an associated e-beam testable structure.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
G01R 31/303 - Test sans contact de circuits intégrés
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 27/118 - Circuits intégrés à tranche maîtresse
G06F 30/392 - Conception de plans ou d’agencements, p. ex. partitionnement ou positionnement
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
36.
IC with test structures and e-beam pads embedded within a contiguous standard cell area
An IC that includes a contiguous standard cell area with a 4×3 e-beam pad that is compatible with advanced manufacturing processes and an associated e-beam testable structure.
H01L 21/26 - Bombardement par des radiations ondulatoires ou corpusculaires
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 29/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails des corps semi-conducteurs ou de leurs électrodes
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 21/3213 - Gravure physique ou chimique des couches, p. ex. pour produire une couche avec une configuration donnée à partir d'une couche étendue déposée au préalable
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01J 37/26 - Microscopes électroniques ou ioniquesTubes à diffraction d'électrons ou d'ions
H03K 19/0944 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs à semi-conducteurs utilisant des transistors à effet de champ utilisant des transistors MOSFET
G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux
G06F 30/39 - Conception de circuits au niveau physique
37.
IC with test structures and E-beam pads embedded within a contiguous standard cell area
An IC that includes a contiguous standard cell area with a 4×3 e-beam pad that is compatible with advanced manufacturing processes and an associated e-beam testable structure.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 21/3213 - Gravure physique ou chimique des couches, p. ex. pour produire une couche avec une configuration donnée à partir d'une couche étendue déposée au préalable
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01J 37/26 - Microscopes électroniques ou ioniquesTubes à diffraction d'électrons ou d'ions
H03K 19/0944 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs à semi-conducteurs utilisant des transistors à effet de champ utilisant des transistors MOSFET
G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux
G06F 30/39 - Conception de circuits au niveau physique
38.
IC with test structures and e-beam pads embedded within a contiguous standard cell area
An IC that includes a contiguous standard cell area with a 4×3 e-beam pad that is compatible with advanced manufacturing processes and an associated e-beam testable structure.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01J 37/26 - Microscopes électroniques ou ioniquesTubes à diffraction d'électrons ou d'ions
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H03K 19/0944 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs à semi-conducteurs utilisant des transistors à effet de champ utilisant des transistors MOSFET
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 21/3213 - Gravure physique ou chimique des couches, p. ex. pour produire une couche avec une configuration donnée à partir d'une couche étendue déposée au préalable
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
Classifying wafers using Collaborative Learning. An initial wafer classification is determined by a rule-based model. A predicted wafer classification is determined by a machine learning model. Multiple users can manually review the classifications to confirm or modify, or to add user classifications. All of the classifications are input to the machine learning model to continuously update its scheme for detection and classification.
G06F 11/07 - Réaction à l'apparition d'un défaut, p. ex. tolérance de certains défauts
G06F 18/211 - Sélection du sous-ensemble de caractéristiques le plus significatif
G06F 18/241 - Techniques de classification relatives au modèle de classification, p. ex. approches paramétriques ou non paramétriques
G06F 18/40 - Dispositions logicielles spécialement adaptées à la reconnaissance des formes, p. ex. interfaces utilisateur ou boîtes à outils à cet effet
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
G06F 3/0482 - Interaction avec des listes d’éléments sélectionnables, p. ex. des menus
A sequence of models accumulates r-squared values for an increasing number of variables in order to quantify the importance of each variable to the prediction of a targeted yield or parametric response.
G06F 17/18 - Opérations mathématiques complexes pour l'évaluation de données statistiques
G06F 18/2113 - Sélection du sous-ensemble de caractéristiques le plus significatif en classant ou en filtrant l'ensemble des caractéristiques, p. ex. en utilisant une mesure de la variance ou de la corrélation croisée des caractéristiques
G06N 5/04 - Modèles d’inférence ou de raisonnement
41.
COLLABORATIVE LEARNING MODEL FOR SEMICONDUCTOR APPLICATIONS
Classifying wafers using Collaborative Learning. An initial wafer classification is determined by a rule-based model. A predicted wafer classification is determined by a machine learning model. Multiple users can manually review the classifications to confirm or modify, or to add user classifications. All of the classifications are input to the machine learning model to continuously update its scheme for detection and classification.
G06K 9/00 - Méthodes ou dispositions pour la lecture ou la reconnaissance de caractères imprimés ou écrits ou pour la reconnaissance de formes, p.ex. d'empreintes digitales
G06K 9/62 - Méthodes ou dispositions pour la reconnaissance utilisant des moyens électroniques
A sequence of models accumulates r-squared values for an increasing number of variables in order to quantify the importance of each variable to the prediction of a targeted yield or parametric response.
G06N 20/10 - Apprentissage automatique utilisant des méthodes à noyaux, p. ex. séparateurs à vaste marge [SVM]
G06F 15/18 - dans lesquels un programme est modifié en fonction de l'expérience acquise par le calculateur lui-même au cours d'un cycle complet; Machines capables de s'instruire (systèmes de commande adaptatifs G05B 13/00;intelligence artificielle G06N)
A machine learning model for each die for imputing process control parameters at the die. The model is based on wafer sort parametric measurements at multiple test sites across the entire wafer, as well as yield results for the wafer. This allows for a better analysis of outlier spatial patterns leading to improved yield results.
A machine learning model for each die for imputing process control parameters at the die. The model is based on wafer sort parametric measurements at multiple test sites across the entire wafer, as well as yield results for the wafer. This allows for a better analysis of outlier spatial patterns leading to improved yield results.
H01L 21/82 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
45.
ANOMALOUS EQUIPMENT TRACE DETECTION AND CLASSIFICATION
Scheme for detection and classification of semiconductor equipment faults. Sensor traces are monitored and processed to separate known abnormal operating conditions from unknown abnormal operating conditions. Feature engineering permits focus on relevant traces for a targeted feature. A machine learning model is built to detect and classify based on an initial classification set of anomalies. The machine learning model is continuously updated as more traces are processed and learned.
An IC that includes a contiguous standard cell area with a 4×3 e-beam pad that is compatible with advanced manufacturing processes and an associated e-beam testable structure.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 21/3213 - Gravure physique ou chimique des couches, p. ex. pour produire une couche avec une configuration donnée à partir d'une couche étendue déposée au préalable
G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
47.
Anomalous equipment trace detection and classification
Scheme for detection and classification of semiconductor equipment faults. Sensor traces are monitored and processed to separate known abnormal operating conditions from unknown abnormal operating conditions. Feature engineering permits focus on relevant traces for a targeted feature. A machine learning model is built to detect and classify based on an initial classification set of anomalies. The machine learning model is continuously updated as more traces are processed and learned.
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.
H01J 37/30 - Tubes à faisceau électronique ou ionique destinés aux traitements localisés d'objets
H01J 37/317 - Tubes à faisceau électronique ou ionique destinés aux traitements localisés d'objets pour modifier les propriétés des objets ou pour leur appliquer des revêtements en couche mince, p. ex. implantation d'ions
G01R 31/306 - Test sans contact utilisant des faisceaux électroniques de circuits imprimés ou hybrides
A maintenance tool for semiconductor process equipment and components. Sensor data is evaluated by machine learning tools to determine when to schedule maintenance action.
G06F 11/22 - Détection ou localisation du matériel d'ordinateur défectueux en effectuant des tests pendant les opérations d'attente ou pendant les temps morts, p. ex. essais de mise en route
G01R 31/26 - Test de dispositifs individuels à semi-conducteurs
51.
Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas
A method for processing a semiconductor wafer uses non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas.
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 27/118 - Circuits intégrés à tranche maîtresse
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
G06F 11/07 - Réaction à l'apparition d'un défaut, p. ex. tolérance de certains défauts
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
G06F 30/39 - Conception de circuits au niveau physique
G06F 30/392 - Conception de plans ou d’agencements, p. ex. partitionnement ou positionnement
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
Described is a method for implementing a snap to capability that enables the manufactured of a valid pattern in a semiconductor device, based upon an originally invalid pattern.
An IC includes a contiguous standard cell area with first, second, and third TS-GATE-short-configured test area geometries disposed therein. In some embodiments, the contiguous standard cell area may further include: fourth and fifth TS-GATE-short-configured test area geometries, and/or other test area geometries, such as tip-to-tip-short, tip-to-side-short, diagonal-short, corner-short, interlayer-overlap-short, via-chamfer-short, merged-via-short, snake-open, stitch-open, via-open, or metal-island-open.
Described here is an apparatus and method of testing a vertical (3D) semiconductor memory structure coupled between word lines and bit lines, by means of a direct connections of a plurality of test pads to word lines and bit lines of the memory structure on memory product wafer. Such connections are created by modified patterns of metal lines through contacts and vias created on the memory product wafer. The described apparatus and method are used for detecting electrical continuity (opens and shorts) in the memory structure, calculating resistance of selected word lines or bit cell strings, or performing more complex tests of memory bit cell transistors. The result of this detection can then be used to find defective regions or memory cells in the semiconductor memory structure. Such a testing device may be referred to as a direct testing system.
Disclosed is a system and method for performing direct memory characterization of memory cells in a memory array using peripheral transistors. A memory array is fabricated using a mask layer defining routing for a set of first stage periphery transistors electrically connected to the word lines of the memory array. A revised mask is used for defining a different routing for a set of second stage periphery transistors including different characteristics than the first stage periphery transistors. Testing is conducted by applying a simulated Erase signal to the nonvolatile memory cells and determining which cells are erased. Based on this test, certain characteristics of the first and/or second stage periphery transistors can be identified that provide improved conditions for the nonvolatile memory cells. A product chip can be manufactured using modified versions of the first stage periphery transistors that incorporate the characteristics that provide the improved condition(s).
G11C 29/56 - Équipements externes pour test de mémoires statiques, p. ex. équipement de test automatique [ATE]Interfaces correspondantes
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 27/11526 - Mémoires mortes programmables électriquement; Procédés de fabrication à étapes multiples de ces dispositifs avec grilles flottantes caractérisées par la région de circuit périphérique
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
G11C 16/14 - Circuits pour effacer électriquement, p. ex. circuits de commutation de la tension d'effacement
H01L 27/11573 - Mémoires mortes programmables électriquement; Procédés de fabrication à étapes multiples de ces dispositifs avec isolateurs de grille à piégeage de charge, p.ex. MNOS ou NROM caractérisées par la région de circuit périphérique
An apparatus and method for testing two-terminal memory elements organized as a cross-point memory array. The apparatus allows functional testing of two-terminal memory elements organized as a cross-point memory array, and built in a short flow manufacturing process. The proposed apparatus substantially eliminates the use of any type of additional active or passive switches, selectors, or decoders. A large number of memory elements of various memory types including planar (two dimensional) or three dimensional memory structures can be tested without the need of manufacturing selectors or running the full flow process.
Described is a CBCM technique that works only with PMOS transistors or only with NMOS transistors. Specifically, a method of monitoring performance of an integrated circuit device using a CBCM technique is disclosed, the method comprising: providing a metrology structure having a pseudo-inverter comprising a pull-up pull-down transistor switch, wherein the transistor switch comprises a pull-up transistor and a pull-down transistor of the same type; charging and discharging a device under test (DUT) coupled to the pseudo-inverter using a non-overlapping clock; measuring capacitance of the DUT with a gate voltage of the pull-up transistor at a preset value; and, using the value of the measured capacitance to estimate a dimension of a structure in the integrated circuit device. The non-overlapping clock is generated by: turning the pull-down transistor off when the pull-up transistor is on; and, turning the pull-down transistor on when the pull-up transistor is off.
G01R 27/26 - Mesure de l'inductance ou de la capacitanceMesure du facteur de qualité, p. ex. en utilisant la méthode par résonanceMesure de facteur de pertesMesure des constantes diélectriques
G01R 31/01 - Passage successif d'articles similaires aux tests, p. ex. tests "tout ou rien" d'une production de sérieTest d'objets en certains points lorsqu'ils passent à travers un poste de test
G01B 7/02 - Dispositions pour la mesure caractérisées par l'utilisation de techniques électriques ou magnétiques pour mesurer la longueur, la largeur ou l'épaisseur
G01N 27/22 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la capacité
58.
Characterization vehicles for printed circuit board and system design
A characterization vehicle may include a first test circuit and a second test circuit located on separate panels of a panelized printed circuit (PC) board. The first test circuit may be fabricated in accordance with a first plurality of design parameters. The second test circuit may be fabricated in accordance with a second plurality of design parameters. The first plurality of design parameters and the second plurality of design parameters may be chosen in accordance with a design of experiment (DOE) concerning one or more design rules or design trade-offs such that at least two corresponding design parameters from the first and second test circuits have identical values, and at least two corresponding design parameters from the first and second test circuits have different values.
H03K 19/00 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
59.
IC chips containing a mixture of standard cells obtained from an original set of design rules and enhanced standard cells that are a substantially uniform variant of the original set of design rules and methods for making the same
The present invention relates to IC chips containing a mixture of standard cells obtained from an original set of design rules and enhanced standard cells that are a variant of the original set of design rules and methods for making the same.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 27/118 - Circuits intégrés à tranche maîtresse
H03K 19/20 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion caractérisés par la fonction logique, p. ex. circuits ET, OU, NI, NON
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
60.
Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells
Improved processes for manufacturing wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements (“NCEM”) of fill cells that contain structures configured target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes. Such processes may involve evaluating Designs of Experiments (“DOEs”), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode(s).
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
G06K 9/03 - Détection ou correction d'erreurs, p.ex. par une seconde exploration
G06K 9/62 - Méthodes ou dispositions pour la reconnaissance utilisant des moyens électroniques
G01R 31/307 - Test sans contact utilisant des faisceaux électroniques de circuits intégrés
G01N 21/956 - Inspection de motifs sur la surface d'objets
H01L 23/544 - Marques appliquées sur le dispositif semi-conducteur, p. ex. marques de repérage, schémas de test
G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux
G01N 21/66 - Systèmes dans lesquels le matériau analysé est excité de façon à ce qu'il émette de la lumière ou qu'il produise un changement de la longueur d'onde de la lumière incidente excité électriquement, p. ex. par électroluminescence
Disclosed techniques conform standard cells in an integrated circuit design into a valid template pattern using a template-based approach to standard cell design. The template architecture stores valid patterns of circuit elements for the design. A Boolean expression comprising an aggregated set of Boolean assertions can be generated for each different combination of cell shape features and edge locations with the cell design to compute a solution that matches with a valid pattern in one of the templates. If the solution evaluates to a Boolean TRUE result, the cell shape(s) can be modified in accordance with the solution. If not, the granularity can be updated by incrementing an “adjustment neighborhood” value and iterating the computations for shape features and edge locations using the updated values for the analysis until a Boolean TRUE result is found or it is determined there is no solution for the set of expressions.
Methods of measuring fin height electrically for devices fabricated using FinFET technology are disclosed here. One method uses an interleaving comb-like test structure with no gate. The other method extracts fin height from total gate capacitance from FinFETS with varying gate lengths. When a comb-like structure with no gate is used to measure fin height, if there is another structure with a gate is used, then the gate capacitance may be measured to independently measure thickness of gate dielectric.
A characterization vehicle may include a first test circuit and a second test circuit located on separate panels of a panelized printed circuit (PC) board. The first test circuit may be fabricated in accordance with a first plurality of design parameters. The second test circuit may be fabricated in accordance with a second plurality of design parameters. The first plurality of design parameters and the second plurality of design parameters may be chosen in accordance with a design of experiment (DOE) concerning one or more design rules or design trade-offs such that at least two corresponding design parameters from the first and second test circuits have identical values, and at least two corresponding design parameters from the first and second test circuits have different values.
G06F 11/22 - Détection ou localisation du matériel d'ordinateur défectueux en effectuant des tests pendant les opérations d'attente ou pendant les temps morts, p. ex. essais de mise en route
A model is generated for predicting failures at the wafer production level. Input data from sensors is stored as an initial dataset, then data exhibiting excursions or useless impact is removed from the dataset. The dataset is converted into target features, where the target features are useful in predicting whether a wafer will be normal or not. A trade-off between positive and negative results is selected, and a plurality of predictive models are created. The final model is selected based on the trade-off criteria, and deployed.
A memory-specific implementation of a test and characterization vehicle utilizes a design layout that is a modified version of the product mask. Specific routing is used to modify the product mask in order to facilitate memory cell characterization. This approach can be applied to any memory architecture with word-line and bit-line perpendicular or substantially perpendicular to each other, including but not limited to, volatile memories such as Static Random Access Memory (SRAM), Dynamic RAM (DRAM), non-volatile memory such as NAND Flash (including three-dimensional NAND Flash), NOR Flash, Phase-change RAM (PRAM), Ferroelectric RAM (FeRAM), Correlated electron RAM (CeRAM), Magnetic RAM (MRAM), Resistive RAM (RRAM), XPoint memory and the like.
G11C 29/12 - Dispositions intégrées pour les tests, p. ex. auto-test intégré [BIST]
G06F 1/3206 - Surveillance d’événements, de dispositifs ou de paramètres initiant un changement de mode d’alimentation
G06F 13/28 - Gestion de demandes d'interconnexion ou de transfert pour l'accès au bus d'entrée/sortie utilisant le transfert par rafale, p. ex. acces direct à la mémoire, vol de cycle
G11C 29/48 - Dispositions dans les mémoires statiques spécialement adaptées au test par des moyens externes à la mémoire, p. ex. utilisant un accès direct à la mémoire [DMA] ou utilisant des chemins d'accès auxiliaires
67.
Direct probing characterization vehicle for transistor, capacitor and resistor testing
A method is disclosed for designing a test vehicle utilizing a layout of a real integrated circuit (IC) product. The method comprises: importing an original full-chip layout of the real IC product; partitioning the original full-chip layout into probe groups, each probe group comprising probe pads, and, a plurality of IC devices within an area of interest (AOI) having original routing interconnect for those IC devices; selecting a set of IC devices within the AOI; and, for the selected set of IC devices, using pattern extraction to remove the original routing interconnect, and create customized interconnect layers (CIL) to reconfigure connection between the individual IC devices. Incorporating the selected set of IC devices with the CIL into the original full-chip layout creates a modified full-chip layout such that a wafer fabricated using the modified full-chip layout comprises a real product with a built-in test vehicle.
G06F 9/455 - ÉmulationInterprétationSimulation de logiciel, p. ex. virtualisation ou émulation des moteurs d’exécution d’applications ou de systèmes d’exploitation
Disclosed is a system and method for collecting trace data of integrated circuits from the back-end assembly tools and using yield, reliability, and burn-in data to distinguish good circuit traces from bad ones. Described further is an system and method for implementing a heuristic mapping of trace data for distinguishing between good or bad traces in an Internet-based or offline application. The result of this detection can then be used for yield improvement or for burn-in reduction where for example burn-in chips having “good” circuit traces are subjected to thermal stress for less time than for chips identified as having “bad” circuit traces.
G06N 20/10 - Apprentissage automatique utilisant des méthodes à noyaux, p. ex. séparateurs à vaste marge [SVM]
69.
Process for making ICs from standard logic cells that utilize TS cut mask(s) and avoid DFM problems caused by closely spaced gate contacts and TSCUT jogs
An improved standard cell chip, library and/or process ensures that there is adequate spacing between TSCUT jogs and nearby gate contacts to avoid inadvertent shorts/leakages that can degrade manufacturing yield or performance.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 27/118 - Circuits intégrés à tranche maîtresse
A method for predicting yield for a semiconductor process. A particular type of wafer is fabricated to have a first set of features disposed on the wafer, with a wafer map identifying a location for each of the first set of features on the wafer. Data from wafer acceptance tests and circuit probe tests is collected over time for wafers of that particular type as made in a semiconductor fabrication process, and at least one training dataset and a least one validation dataset are created from the collected data. A second set of “engineered” features are created and also incorporated onto the wafer and wafer map. Important features from the first and second sets of features are identified and selected, and using those important features as inputs, a number of different process models are run, with yield as the target. The results of the different models can be combined, for example, statistically.
Robust machine learning predictions. Temporal dependencies of process targets for different machine learning models can be captured and evaluated for the impact on process performance for target. The most robust of these different models is selected for deployment based on minimizing variance for the desired performance characteristic.
G05B 19/418 - Commande totale d'usine, c.-à-d. commande centralisée de plusieurs machines, p. ex. commande numérique directe ou distribuée [DNC], systèmes d'ateliers flexibles [FMS], systèmes de fabrication intégrés [IMS], productique [CIM]
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
G05B 13/02 - Systèmes de commande adaptatifs, c.-à-d. systèmes se réglant eux-mêmes automatiquement pour obtenir un rendement optimal suivant un critère prédéterminé électriques
72.
Process control techniques for semiconductor manufacturing processes
Techniques for measuring and/or compensating for process variations in a semiconductor manufacturing processes. Machine learning algorithms are used on extensive sets of input data, including upstream data, to organize and pre-process the input data, and to correlate the input data to specific features of interest. The correlations can then be used to make process adjustments. The techniques may be applied to any feature or step of the semiconductor manufacturing process, such as overlay, critical dimension, and yield prediction.
G06N 7/00 - Agencements informatiques fondés sur des modèles mathématiques spécifiques
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
09 - Appareils et instruments scientifiques et électriques
Produits et services
Computer software for testing communication interfaces on factory production equipment for compliance with industry standards and for suitability for specific factory processing scenarios
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Software for equipment control and data analytics of
semiconductor design and manufacturing processes, and
software for equipment control and data analytics of
electronics design and manufacturing processes. Engineering and consulting services in the fields of
technical support, namely, assisting users with use of the
software and troubleshooting in the nature of diagnosing
computer software and hardware problems, engineering
know-how, and engineering and technological consultancy
related to the best practices for the manufacturing of
electronics and semiconductors; engineering and
technological consulting services in the fields of yield,
performance improvement, and productivity improvement in the
manufacture, testing and packaging of electronics and
semiconductors; cloud computing featuring an analytic
software platform to access and visualize big data for
decision support; platform as a service (PAAS) and software
as a service (SaaS) featuring computer software platforms
for business, product design, and manufacturing data
analysis.
77.
Test structures for measuring silicon thickness in fully depleted silicon-on-insulator technologies
G01B 7/06 - Dispositions pour la mesure caractérisées par l'utilisation de techniques électriques ou magnétiques pour mesurer la longueur, la largeur ou l'épaisseur pour mesurer l'épaisseur
G01R 27/26 - Mesure de l'inductance ou de la capacitanceMesure du facteur de qualité, p. ex. en utilisant la méthode par résonanceMesure de facteur de pertesMesure des constantes diélectriques
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
78.
Process for making semiconductor dies, chips, and wafers using non-contact measurements obtained from DOEs of NCEM-enabled fill cells on wafers that include multiple steps for enabling NC detecteion of AACNT-TS via opens
Improved processes for manufacturing semiconductor wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements (“NCEM”) of fill cells that contain structures configured to target/expose a variety of open-circuit, short-circuit, leakage, and/or excessive resistance failure modes. Such processes include evaluating one or more Designs of Experiments (“DOEs”), each comprised of multiple NCEM-enabled fill cells, in at least two variants, targeted to the same failure mode. Such DOEs include multiple means/steps for enabling non-contact (NC) detection of AACNT-TS via opens.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Software for equipment control and data analytics of
semiconductor design and manufacturing processes, and
software for equipment control and data analytics of
electronics design and manufacturing processes. Engineering and consulting services in the fields of
technical support, namely, assisting users with use of the
software and troubleshooting in the nature of diagnosing
computer software and hardware problems, engineering
know-how, and best practices for the manufacturing of
electronics and semiconductors; engineering and consulting
services in the fields of yield, performance improvement,
and productivity improvement in the manufacture test and
packaging of electronics and semiconductors; cloud computing
featuring an analytic software platform to access and
visualize big data for decision support; platform as a
service (PAAS) and software as a service (SaaS) featuring
computer software platforms for business, product design,
and manufacturing data analysis.
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Software for equipment control and data analytics of
semiconductor design and manufacturing processes, and
software for equipment control and data analytics of
electronics design and manufacturing processes. Engineering and consulting services in the fields of
technical support, namely, assisting users with use of the
software and troubleshooting in the nature of diagnosing
computer software and hardware problems, engineering
know-how, and best practices for the manufacturing of
electronics and semiconductors; engineering and consulting
services in the fields of yield, performance improvement,
and productivity improvement in the manufacture test and
packaging of electronics and semiconductors; cloud computing
featuring an analytic software platform to access and
visualize big data for decision support; platform as a
service (PAAS) and software as a service (SaaS) featuring
computer software platforms for business, product design,
and manufacturing data analysis.
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Computer software for use in providing automated
characterization and analysis of product chip and cell
library layouts in the field of semiconductor manufacturing. Engineering and consulting services in the fields of
technical support, namely, assisting users with use of the
software and troubleshooting in the nature of diagnosing
computer software and hardware problems, engineering
know-how, and best practices for semiconductor companies;
engineering and consulting services in the fields of yield,
performance improvement, and productivity improvement in the
manufacture test and packaging of semiconductors; cloud
computing featuring an analytic software platform to access
and visualize big data for decision support; platform as a
service (PAAS) featuring computer software platforms for
business and manufacturing data analysis and decision
support.
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
(1) Software for managing equipment control and data analytics of semiconductor design and manufacturing processes, and software for managing equipment control and data analytics of electronics design and manufacturing processes (1) Engineering and consulting services in the fields of technical support, namely, assisting users with use of the software and troubleshooting in the nature of diagnosing computer software and hardware problems, engineering know-how, and best practices for the manufacturing of electronics and semiconductors; engineering and consulting services in the fields of yield, performance improvement, and productivity improvement in the manufacture, testing and packaging of electronics and semiconductors; cloud computing featuring an analytic software platform to access and visualize big data for decision support; platform as a service (PAAS) and software as a service (SaaS) featuring computer software platforms for business, product design, and manufacturing data analysis.
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
(1) Software for managing equipment control and data analytics of semiconductor design and manufacturing processes, and software for managing equipment control and data analytics of electronics design and manufacturing processes (1) Engineering and consulting services in the fields of technical support, namely, assisting users with use of the software and troubleshooting in the nature of diagnosing computer software and hardware problems, engineering know-how, and best practices for the manufacturing of electronics and semiconductors; engineering and consulting services in the fields of yield, performance improvement, and productivity improvement in the manufacture, testing and packaging of electronics and semiconductors; cloud computing featuring an analytic software platform to access and visualize big data for decision support; platform as a service (PAAS) and software as a service (SaaS) featuring computer software platforms for business, product design, and manufacturing data analysis.
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
(1) Software for managing equipment control and data analytics of semiconductor design and manufacturing processes, and software for managing equipment control and data analytics of electronics design and manufacturing processes (1) Engineering and consulting services in the fields of technical support, namely, assisting users with use of the software and troubleshooting in the nature of diagnosing computer software and hardware problems, engineering know-how, and best practices for the manufacturing of electronics and semiconductors; engineering and consulting services in the fields of yield, performance improvement, and productivity improvement in the manufacture, testing and packaging of electronics and semiconductors; cloud computing featuring an analytic software platform to access and visualize big data for decision support; platform as a service (PAAS) and software as a service (SaaS) featuring computer software platforms for business, product design, and manufacturing data analysis.
85.
INTEGRATED CIRCUIT CONTAINING DOES OF NCEM-ENABLED FILL CELLS
Wafers, chips, or dies that contain fill cells with structures configured to obtain in-line data via non-contact electrical measurements ("NCEM"). Such NCEM-enabled fill cells may target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes. Such wafers, chips, or dies may include Designs of Experiments ("DOEs"), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode(s).
G01N 23/00 - Recherche ou analyse des matériaux par l'utilisation de rayonnement [ondes ou particules], p. ex. rayons X ou neutrons, non couvertes par les groupes , ou
G01R 31/26 - Test de dispositifs individuels à semi-conducteurs
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Software for managing equipment control and data analytics of semiconductor design and manufacturing processes; Software for managing equipment control and data analytics of electronics design and manufacturing processes Engineering and consulting services, namely, technical support service in the nature of assisting users with use of the software and troubleshooting in the nature of diagnosing computer software and hardware problems; engineering and consulting services in the fields of testing of electronics and semiconductors; cloud computing featuring an analytic software platform to access and visualize big data for decision support; platform as a service (PAAS) and software as a service (SaaS) featuring computer software platforms for analyzing product design, and business and manufacturing data analysis
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Software for managing equipment control and data analytics of semiconductor design and manufacturing processes; Software for managing equipment control and data analytics of electronics design and manufacturing processes Engineering and consulting services, namely, technical support service in the nature of assisting users with use of the software and troubleshooting in the nature of diagnosing computer software and hardware problems; engineering and consulting services in the fields of testing of electronics and semiconductors; cloud computing featuring an analytic software platform to access and visualize big data for decision support; platform as a service (PAAS) and software as a service (SaaS) featuring computer software platforms for analyzing product design, and business and manufacturing data analysis
88.
Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and AA-short-configured, NCEM-enabled fill cells
An IC includes logic cells, selected from a standard cell library, and fill cells, configured for compatibility with the standard logic cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The IC includes such NCEM-enabled fill cells configured to enable detection and/or measurement of a variety of open-circuit and short-circuit failure modes, including at least one via-open-related failure mode, one GATE-short-related failure mode, one GATECNT-short-related failure mode, and one AA-short-related failure mode.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 23/528 - Configuration de la structure d'interconnexion
89.
Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and TS-short-configured, NCEM-enabled fill cells
An IC includes logic cells, selected from a standard cell library, and fill cells, configured for compatibility with the standard logic cells. The fill cells contain structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). The IC includes such NCEM-enabled fill cells configured to enable detection and/or measurement of a variety of open-circuit and short-circuit failure modes, including at least one via-open-related failure mode, one GATE-short-related failure mode, one GATECNT-short-related failure mode, and one TS-short-related failure mode.
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 23/528 - Configuration de la structure d'interconnexion
90.
D flip-flop cells, with DFM-optimized M0 cuts and V0 adjacencies
A library of a DFM-improved standard logic cells (including D flip-flop cells) that avoid pattern-degrading configurations in the M0 and/or V0 layer(s) is disclosed, along with wafers, chips and systems constructed from such cells.
H01L 27/118 - Circuits intégrés à tranche maîtresse
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
A library of a DFM-improved standard logic cells that avoid pattern-degrading configurations in the M0 and/or V0 layer(s), and includes 13-CPP and 17-CPP D flip-flop cells, is disclosed, along with wafers, chips and systems constructed from such cells.
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 27/118 - Circuits intégrés à tranche maîtresse
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
A library of a DFM-improved standard logic cells that avoid pattern-degrading configurations in the M0 layer is disclosed, along with wafers, chips and systems constructed from such cells.
H01L 27/118 - Circuits intégrés à tranche maîtresse
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Computer software for use in providing automated characterization and analysis of product chip and cell library layouts in the field of semiconductor manufacturing Engineering and consulting services in the fields of technical support, namely, assisting users with use of the software and troubleshooting in the nature of diagnosing computer software and hardware problems, engineering know-how, and best practices for semiconductor companies; engineering and consulting services in the fields of yield, performance improvement, and productivity improvement in the manufacture test and packaging of semiconductors; cloud computing featuring an analytic software platform to access and visualize big data for decision support; platform as a service (PAAS) featuring computer software platforms for business and manufacturing data analysis and decision support
94.
E-beam inspection apparatus and method of using the same on various integrated circuit chips
The present invention discloses an e-beam inspection tool, and an apparatus for detecting defects. In one aspect is described an apparatus for detecting defects that includes a dual-deflection system that moves the e-beam over the integrated circuit to each of the plurality of predetermined locations, the dual deflection system including a magnetic deflection component that provides by magnetic deflection for movement of the e-beam through a plurality of areas on the integrated circuit and an electrostatic deflection component that provides by electrostatic deflection for movement of the e-beam within each of the plurality of areas.
A library of a DFM-improved standard logic cells that avoid pattern-degrading configurations in the M0 and/or V0 layer(s) is disclosed, along with wafers, chips and systems constructed from such cells.
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
96.
High-yielding standard cell library and circuits made therefrom
An improved 20/22 nm standard cell library, as depicted in FIGS. 1-491, achieves surprisingly significant improvements in manufacturing yield, as compared to a commercially-used library for the same fabrication process. The invention relates to product ICs made using this library (or topologically equivalent variants thereof), as well as processes for making such product ICs using said library (or its variants).
H03K 19/177 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des circuits logiques élémentaires comme composants disposés sous forme matricielle
H03K 19/0175 - Dispositions pour le couplageDispositions pour l'interface
97.
OPPORTUNISTIC PLACEMENT OF IC TEST STRUCTURES AND/OR E-BEAM TARGET PADS IN AREAS OTHERWISE USED FOR FILLER CELLS, TAP CELLS, DECAP CELLS, SCRIBE LINES, AND/OR DUMMY FILL, AS WELL AS PRODUCT IC CHIPS CONTAINING SAME
Product ICs/wafers include additional diagnostic, test, or monitoring structures opportunistically placed in filler cell positions, within tap cells, within decap cells, within scribe line areas, and/or within dummy fill regions. Improved fabrication processes utilize data from such structure (s) in wafer disposition decisions, rework decisions, process control, yield learning, or fault diagnosis.
09 - Appareils et instruments scientifiques et électriques
Produits et services
Software applications for the secure transport of production data and collaboration information from within a facility to either an external partner or to an internal application or user; computer software data transmission security tools to prevent the interception of sensitive data.
