A semiconductor device includes first to fourth electrodes, first to fourth semiconductor regions, and first and second insulating parts. The first semiconductor region is located on the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on the second semiconductor region. The second electrode is located on the third semiconductor region. The third electrode is arranged with the second semiconductor region. The first insulating part is located between the second semiconductor region and the third electrode. The fourth electrode is arranged with the first semiconductor region and the third electrode. The second insulating part is located between the first semiconductor region and the fourth electrode and between the third electrode and the fourth electrode. The fourth semiconductor region is located under the third electrode. The fourth semiconductor region is electrically connected with the second electrode.
A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. A concentration of the first impurity has a maximum value at a first position in a first direction inside the first semiconductor layer. The first direction is from the first electrode toward the second electrode. A concentration of proton is greater than the concentration of the first impurity in the second semiconductor layer. The concentration of the first impurity is greater than the concentration of proton in the third semiconductor layer. The concentration of the first impurity is greater than the concentration of proton in at least a portion of the first semiconductor layer at the second semiconductor layer side. The concentration of proton has a maximum value at a second position positioned at a side of the first position opposite to the first direction.
H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
H01L 29/66 - Types de dispositifs semi-conducteurs
An embodiment includes a first substrate, a second substrate, a first semiconductor element, a second semiconductor element and a third substrate. The third substrate is provided between the first substrate and the second substrate. The first semiconductor element is provided on the first substrate. The second semiconductor element is provided on the second substrate. The third substrate includes a first connection member and a second connection member that have thermal conductivity and penetrate through the third substrate. The first semiconductor element is thermally coupled to the first substrate and coupled through the first connection member to the second substrate. The second semiconductor element is thermally coupled to the second substrate and coupled through the second connection member to the first substrate.
H01L 23/367 - Refroidissement facilité par la forme du dispositif
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
H01L 23/498 - Connexions électriques sur des substrats isolants
H01L 23/538 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre la structure d'interconnexion entre une pluralité de puces semi-conductrices se trouvant au-dessus ou à l'intérieur de substrats isolants
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
According to one embodiment, a driving device includes a power converter, a voltage controller and a phase adjuster. The phase adjuster is configured to execute a first phase control process of receiving first information relating to a relationship between a phase of a motor current flowing through the motor and a rotational position of the motor, and adjusting the phase of the driving voltage, based on the first information. The phase adjuster is configured to execute a second phase control process of receiving second information relating to a magnitude of the motor current and third information relating to a rotational speed of the motor, and adjusting the phase of the driving voltage, based on the second information and the third information.
H02P 21/18 - Estimation de la position ou de la vitesse
H02P 27/06 - Dispositions ou procédés pour la commande de moteurs à courant alternatif caractérisés par le type de tension d'alimentation utilisant une tension d’alimentation à fréquence variable, p. ex. tension d’alimentation d’onduleurs ou de convertisseurs utilisant des convertisseurs de courant continu en courant alternatif ou des onduleurs
According to one embodiment, a suspension assembly includes a support plate, a head supported by the support plate, and a wiring member provided on the support plate, and constituted by a stacked layer body. The wiring member includes a distal portion electrically connected to the head, a connection end portion extending to an outside of the support plate, and a plurality of wirings. The connection end portion includes an opening extending in a first direction, a plurality of connection terminals each formed by a conductive layer and arranged in the first direction in the opening, and a partition provided at the connection terminal to protrude from the side of the second insulating layer.
A semiconductor device includes a first electrode, a first semiconductor region of a first type including first and second regions, second semiconductor regions of a second type on the first region, third semiconductor regions of the first type on the second semiconductor regions, a second electrode electrically connected to the third semiconductor regions, first structures in the first region, each of which includes an insulating region and a conductive region, second structures in the second region, each of which includes an insulating region and a conductive region, a third electrode surrounding the first and second structures, a first insulating portion between the second semiconductor region and the third electrode, a second insulating portion above the second region, and a wiring portion above the second insulating portion and electrically connected to the third electrode.
A semiconductor device of embodiments includes: a semiconductor layer including a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type, and a third semiconductor region of the first conductive type; and a gate electrode. The second semiconductor region includes first, second, and third regions. The gate electrode includes first, second, and third portions. The first, second, and third portions face the first, second, and third regions, respectively. The first portion, the second portion, and the third portion contain a first material, a second material, and a third material, respectively. When the first conductive type is n-type, the work function of the first material and the third material are smaller than that of the second material. When the first conductive type is p-type, the work function of the first material and the third material are larger than that of the second material.
H01L 29/41 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative
H01L 29/04 - Corps semi-conducteurs caractérisés par leur structure cristalline, p.ex. polycristalline, cubique ou à orientation particulière des plans cristallins
H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
8.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device according to the present embodiment includes a semiconductor element having a first face, a second face located on an opposite side to the first face, and a side face located between the first face and the second face. A first electrode layer is provided on the first face of the semiconductor element. A second electrode layer is provided on the second face of the semiconductor element. An outer edge portion on the second face is more rounded compared to an outer edge portion on the first face. A thickness of the second electrode layer gradually decreases as the second electrode layer extends closer to the side face.
H01L 21/78 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
According to one embodiment, there is provided a disk device including a disk medium, a memory and a controller. On the disk medium, data is recorded according to an address. The controller generates or updates a database and stores the database in the memory as a command including the address is received. The database is associated with address ranges of commands, and includes a tree-like array in accordance with command addresses and time series. The controller manages commands using the database.
A parameter optimization device includes a processing device configured to: generate a partial search space of a second dimensionality from a search space of a first dimensionality, the second dimensionality being less than the first dimensionality; select a plurality of search points in the partial search space by correcting an acquisition function with a local penalty function; and observe, in parallel, a plurality of objective functions corresponding respectively to the plurality of search points.
G06F 30/12 - CAO géométrique caractérisée par des moyens d’entrée spécialement adaptés à la CAO, p. ex. interfaces utilisateur graphiques [UIG] spécialement adaptées à la CAO
An embodiment includes a controller and a driver. The controller controls to drive a semiconductor element having a first gate electrode and a second gate electrode base on a control signal. The driver outputs a first driving signal to the first gate electrode and a second driving signal to the second gate electrode. The first driving signal drives the first gate electrode at ON or OFF timing of the control signal. The second driving signal drives the second gate electrode a timing earlier than the OFF timing of the control signal. The driver switches output impedances corresponding to the switching speed of the semiconductor element.
H03K 17/16 - Modifications pour éliminer les tensions ou courants parasites
H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
H02M 1/00 - Détails d'appareils pour transformation
H02M 1/08 - Circuits spécialement adaptés à la production d'une tension de commande pour les dispositifs à semi-conducteurs incorporés dans des convertisseurs statiques
H02M 7/5387 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant alternatif sans possibilité de réversibilité par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs, p. ex. onduleurs à impulsions à un seul commutateur dans une configuration en pont
A semiconductor device includes first and second electrodes, first to third semiconductor regions, a structure body, and first and second connection parts. The structure body includes an insulating part, and third and fourth electrodes. A shape of the structure body in a plane is a first hexagon. The first hexagon includes a pair of first sides, a pair of second sides, and a pair of third sides. A length of the pair of first sides is greater than a length of the pair of second sides. The fourth electrode includes a pair of first electrode regions, a pair of second electrode regions, and a pair of third electrode regions. The second connection part is located on the pair of first electrode regions.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/04 - Corps semi-conducteurs caractérisés par leur structure cristalline, p.ex. polycristalline, cubique ou à orientation particulière des plans cristallins
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
13.
INSPECTION PROCESSING DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Provided are: an inspection processing device capable of improving efficiency; and a semiconductor device manufacturing method. According to an embodiment, an inspection processing device includes a storage unit and a processing unit. The storage unit is capable of storing a feature value distribution that includes first and second feature value distribution regions pertaining to a target device. The processing unit is capable of performing a current first inspection pertaining to the target device on the basis of the first and second feature value distribution regions which are stored in the storage unit. The feature value distribution pertains to a first past inspection result of a past first inspection pertaining to the target device, and to a second past inspection result. The second past inspection result is acquired by means of a second inspection which is subsequent to past first processing and which is performed after the past first inspection. A first defect rate of the second past inspection result corresponding to the first feature value distribution region is higher than a second defect rate of the second past inspection result corresponding to the second feature value distribution region.
This semiconductor device includes: a silicon carbide layer which has an element region and a termination region that surrounds the element region, the silicon carbide layer including a first semiconductor part that has a first conductivity type and includes a first portion in the element region, and a second semiconductor part that is provided on the first semiconductor part in a first direction and is adjacent to the first portion in a second direction that is orthogonal to the first direction; a gate electrode which faces the second semiconductor part in the element region; a first insulating film which is provided between the gate electrode and the silicon carbide layer; and a second insulating film which is provided on the first portion of the first semiconductor part, and which is thicker than the first insulating film.
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
H01L 21/329 - Procédés comportant plusieurs étapes pour la fabrication de dispositifs du type bipolaire, p.ex. diodes, transistors, thyristors les dispositifs comportant une ou deux électrodes, p.ex. diodes
H01L 21/336 - Transistors à effet de champ à grille isolée
H01L 29/12 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués
Provided is a semiconductor device capable of suppressing the occurrence of destruction. This semiconductor device is provided with a first electrode, a semiconductor layer, a second electrode, a gate electrode, and a third electrode. The semiconductor layer includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type, and contains silicon carbide. The gate electrode faces the second semiconductor region across a gate insulating layer in a second direction perpendicular to a first direction from the first electrode toward the first semiconductor region. The gate electrode includes a first portion additionally facing the third semiconductor region, a second portion located at an end portion of the gate electrode in a third direction perpendicular to the first direction and the second direction, and a third portion located between the first portion and the second portion in the third direction. The impurity concentration of the second portion is lower than the impurity concentration of the third portion. The third electrode is electrically connected to the gate electrode and is spaced apart from the second electrode.
A semiconductor device includes first to fourth electrodes, first to third semiconductor regions, and first and second insulating parts. The first insulating part is located between the second semiconductor region and the third electrode. The fourth electrode is arranged with the first and second semiconductor regions. The second insulating part is located between the first semiconductor region and the fourth electrode and between the second semiconductor region and the fourth electrode. the second insulating part includes first and second insulating regions. The first insulating region surrounds the fourth electrode and contacts the fourth electrode. The second insulating region surrounds the first insulating region and contacts the first insulating region. A dielectric constant of the second insulating region is less than a dielectric constant of the first insulating region.
According to one embodiment, a magnetic disk device includes a disk, a write head, an adjustment unit, and a write processing unit. The adjustment unit adjusts each of a first adjustment value, a second adjustment value, and a third adjustment value. The write processing unit can select shingled magnetic recording and perform write processing based on the first to third adjustment values. When the number of the plurality of tracks of the band is t+1 and the number of unused sectors among the plurality of sectors of the band is e. The adjustment unit adjusts the first to third adjustment values to establish ext.
According to an embodiment, an information processing apparatus includes a processing unit configured to: detect whether or not one or more conditions defining timings to perform learning of a regression model configured to predict one or more objective variables for a plurality of explanatory variables are satisfied; determine priorities of the plurality of explanatory variables according to a condition detected to be satisfied; and perform learning of the regression model by using an objective function and learning data, the objective function including a regularization term having a regularization strength changing according to the priorities.
According to one embodiment, a magnetic disk device configured to record data in a shingled-recording manner, wherein the device performs sequential write in a shingled-recording area on a magnetic disk such that data to be written in a write target track and data located in a one-forward track of the write target track are received on a volatile memory and then write with respect to the write target track is performed, and upon occurrence of an unexpected power cut, the device stores data unwritten in the shingled-recording area out of the data received on the volatile memory in a nonvolatile memory.
G11B 5/02 - Procédés d'enregistrement, de reproduction ou d'effacementCircuits correspondants pour la lecture, l'écriture ou l'effacement
G11B 5/55 - Changement, sélection ou acquisition de la piste par déplacement de la tête
G11B 19/04 - Dispositions prévenant, évitant ou signalant la surimpression sur le même support, ou d'autres fonctionnements défectueux de l'enregistrement ou de la reproduction
According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor member, a second semiconductor member, a first compound member, and a first insulating member. The third electrode includes a first electrode portion. The first semiconductor member includes Alx1Ga1-x1N (0≤x1<1). The first semiconductor member includes first to seventh partial regions. The second semiconductor member includes Alx2Ga1-x2N (0
H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
21.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device according to an embodiment includes: a first electrode; a first semiconductor region of a first conductive type provided on the first electrode; a second semiconductor region of a second conductive type provided on the first semiconductor region; a third semiconductor region of a first conductive type provided on the second semiconductor region; a gate electrode provided in the second semiconductor region via a gate insulating film; a contact portion having a first portion and a second portion; and a second electrode electrically connected to the contact portion. The first portion is aligned with the third semiconductor region and a part of the second semiconductor region, and the second portion is provided at a lower end of the first portion and has a width larger than a width of the first portion at an upper end of the third semiconductor region.
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 21/04 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives les dispositifs ayant des barrières de potentiel, p. ex. une jonction PN, une région d'appauvrissement ou une région de concentration de porteurs de charges
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
According to one embodiment, a magnetic disk drive of shingled magnetic recording (SMR), wherein user data is written to a disk with a header such as a preamble attached thereto, for each data frame including a plurality of blocks, which is a data area in a track of the disk to which the user data is written.
According to one embodiment, a semiconductor device includes a first transistor, a second transistor, a third transistor, a fourth transistor, a first level shifter, and a second level shifter. At a time of outputting a first voltage from a first terminal, a power supply voltage is supplied to the first terminal from the third transistor in accordance with a fourth signal output from the second level shifter, and then the first voltage is supplied to the first terminal from the first transistor in accordance with a second signal output from the first level shifter. At a time of outputting a second voltage from the first terminal, a ground voltage is supplied to the first terminal from the fourth transistor in accordance with the second signal, and then the second voltage is supplied to the first terminal from the second transistor in accordance with the fourth signal.
First and second semiconductor devices include a first side and first to sixth terminals, couples the first terminal to the second terminal while the sixth, fourth and fifth terminals are receiving first, second and third voltages, and couples the first terminal to the third terminal while the sixth, fourth and fifth terminals are receiving fourth, third and second voltages. A first delay circuit supplies, to the third terminal of the second semiconductor device, a delayed signal at an input end coupled to the second terminal of the first semiconductor device. The first conductor is coupled to the fourth terminal of the first semiconductor device and the fifth terminal of the second semiconductor device. The second conductor is coupled to the fifth terminal of the first semiconductor device and the fourth terminal of the second semiconductor device. The first sides of the first and second semiconductor devices face each other.
According to one embodiment, a semiconductor device includes a substrate; a first transistor and a second transistor having their sources commonly coupled to each other; a light emitting element having an anode electrode and a cathode electrode; a light receiving element turning on or off the first transistor and the second transistor depending on a light emission state of the light emitting element; a first filter element coupled to the anode electrode of the light emitting element; and a second filter element coupled to the cathode electrode of the light emitting element.
H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides
H01L 25/075 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 33/62 - Dispositions pour conduire le courant électrique vers le corps semi-conducteur ou depuis celui-ci, p.ex. grille de connexion, fil de connexion ou billes de soudure
According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor member, a second semiconductor member, a first insulating member, and a second insulating member. The first to third electrodes extend along a first direction. The third electrode includes a first electrode portion. The first semiconductor member includes Alx1Ga1-x1N (0≤x1<1). The first semiconductor member includes a first partial region, a second partial region, a third partial region, a fourth partial region, a fifth partial region, and a sixth partial region. The second semiconductor member includes Alx2Ga1-x2N (0
H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
[Problem] To provide a semiconductor device having low inductance. [Solution] A semiconductor device according to an embodiment includes: a first circuit board having a plurality of first semiconductor elements; a second circuit board having a plurality of second semiconductor elements; and an output terminal that connects second output wiring of the second circuit board to first output wiring of the first circuit board and has a flat surface part, a first leg part, a second leg part, and a first bridge part, wherein the first leg part is connected to the first output wiring, the second leg part is connected to the second output wiring, and the first leg part and the second leg part are connected by the first bridge part.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
H01L 21/60 - Fixation des fils de connexion ou d'autres pièces conductrices, devant servir à conduire le courant vers le ou hors du dispositif pendant son fonctionnement
This method for manufacturing a semiconductor device comprises: a step for forming a SiC layer on a single crystal SiC layer of a substrate having a polycrystalline SiC substrate, which has a first surface and a second surface, and a single crystal SiC layer, which is provided on the second surface; a step for forming a first insulating film and a second insulating film on the SiC layer, the first insulating film and second insulating film being spaced a third width apart in a first direction parallel to the second surface; a step for removing a first portion, which extends in a second direction parallel to the second surface and crossing the first direction, and a second portion, which is provided on the first portion and extends in the second direction, of the SiC layer below the space between the first insulating film and the second insulating film, thereby forming a second groove which has a second width narrower than the third width in the first direction, extends in the second direction, and cuts the single crystal SiC layer and the SiC layer, and in which the polycrystalline SiC substrate is exposed at the bottom; and a step for forming, through dicing, a first groove which is provided below the second groove, has a first width narrower than the second width in the first direction, extends in the second direction, and cuts the polycrystalline SiC substrate.
H01L 21/301 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour subdiviser un corps semi-conducteur en parties distinctes, p. ex. cloisonnement en zones séparées
H01L 21/461 - Traitement de corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour changer les caractéristiques physiques ou la forme de leur surface, p. ex. gravure, polissage, découpage
A semiconductor device according to one embodiment of the present invention includes a body part having: a substrate; and a chip mounted on a device surface, which is one of the outer surfaces of the substrate and faces one side in a first direction. Provided is a housing that accommodates the body part. Provided is a heat transfer pin. The housing has a lid member facing the device surface. The heat transfer pin is held by the lid member and extends from the lid member toward the chip.
According to one embodiment, a magnetic disk device includes a disk, a write head, and a write processing unit. The write processing unit executes first write processing of writing data to a first segment of a first data sector in a first data track. The write processing unit then executes second write processing of writing data to a first segment of a second data sector in the first data track. The write processing unit then executes third write processing of writing data to a second segment of the first data sector in a second data track.
According to one embodiment, a magnetic recording/reproducing device includes a housing which accommodates a magnetic recording medium, and a magnetic head which records or reproduces magnetic data relative the magnetic recording medium, and a synthetic adsorbent provided in the housing and containing a polystyrene-divinylbenzene copolymer.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
G11B 5/00 - Enregistrement par magnétisation ou démagnétisation d'un support d'enregistrementReproduction par des moyens magnétiquesSupports d'enregistrement correspondants
G11B 5/60 - Maintien dynamique de l'écartement entre têtes et supports d'enregistrement à l'aide d'un fluide
G11B 5/725 - Revêtements protecteurs, p. ex. antistatiques contenant un lubrifiant
A disk device according to an embodiment includes a first suspension and a second suspension. The first suspension has a first base plate mounted to the arm. The second suspension has a second base plate mounted to the arm. The arm with a through-hole includes a first surface, a second surface, and an inner surface. The through-hole is open to the first surface and the second surface. The inner surface defines the through-hole. The first base plate includes a first boss accommodated in the through-hole in contact with the inner surface. The second base plate includes a second boss accommodated in the through-hole in contact with the inner surface. The second boss is at least partly held between the inner surface and the first boss.
According to one embodiment, a semiconductor device has a substrate with an upper face and a lower face. The substrate includes a first end portion near a first edge and a second end portion near a second edge. An element region is between the first end portion and the second end portion. A first ridge portion protrudes from a first portion of the substrate that is between the first end portion and the element portion. The first ridge portion is on the lower face. A second ridge portion protrudes from a second portion of the substrate that is between the second end portion and the element portion in the second direction. The second ridge portion is on the lower face.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 21/784 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs qui consistent chacun en un seul élément de circuit le substrat étant un corps semi-conducteur
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
According to one embodiment, a connector includes a housing and a plurality of leads. The housing has a first surface and a second surface opposite the first surface. The housing is provided with a through hole opening to the first surface and the second surface. Each of the plurality of leads includes a first terminal accommodated in the through hole.
Provided is a method for manufacturing a semiconductor device by which characteristics can be improved. According to one embodiment, a method for manufacturing a semiconductor device involves forming a first metal layer containing a first metal element on a first surface of a structure including a substrate including SiC and including a first surface. The manufacturing method includes injecting a first element containing at least one selected from the group consisting of He, Ne, Ar, Kr, Xe, Rn, and Si to the first surface through the first metal layer. The manufacturing method involves irradiating the first surface with a laser through the first metal layer after the injection.
A semiconductor device according to an embodiment of the present invention comprises: a base substrate; a case provided on the upper surface of the base substrate; a first laminate provided inside the case on the upper surface of the base substrate; a second laminate provided apart from the first laminate on the upper surface of the base substrate; and a flat plate-like first conductor having a first part in contact with the first laminate and a second part in contact with the second laminate. The first laminate includes a first insulator, a second conductor provided on the upper surface of the first insulator and brought into in contact with the first part of the first conductor, and a first semiconductor element electrically connected to the second conductor. The second laminate includes a second insulator and a third conductor provided on the upper surface of the second insulator and brought into contact with the second part of the first conductor, and does not include a semiconductor element.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
Provided is a highly reliable semiconductor device. A semiconductor device according to an embodiment comprises: pellets; a first conductor and a second conductor that sandwich the pellets in a first direction; a first joint material that joins the pellets and the first conductor; and a second joint material that joins the pellets and the second conductor, wherein a first surface of the first conductor facing the pellets has a plurality of projections overlapping with the pellets and a groove provided so as to surround the pellets when viewed in the first direction, a design value of the height of the plurality of projections is a first value, and the volume of the groove is based on the volume of a portion that is sandwiched between the pellets and the first conductor when a first height between the pellets and the first conductor is a second value that is greater than the first value.
A semiconductor device manufacturing method according to an embodiment includes a first attaching step, a grinding step, a singulation step, and a support substrate separation step. The first attaching step is a step for attaching, to a support substrate, a device surface on which a circuit pattern of a base material made of a semiconductor material is formed. The grinding step is a step for grinding the surface on the opposite side to the device surface while the device surface is supported by the support substrate. The singulation step is a step for cutting the base material while the base material is supported by the support substrate, and singulating the base material. The support substrate separation step is a step for separating the support substrate from the base material.
H01L 21/304 - Traitement mécanique, p. ex. meulage, polissage, coupe
H01L 21/301 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour subdiviser un corps semi-conducteur en parties distinctes, p. ex. cloisonnement en zones séparées
An insulating member includes a fixed charge. The insulating member includes a first insulating part. The first insulating part includes a first region, a second region, and a third region. The first region is positioned between a gate electrode and the second region in a first direction. The second region is positioned between the first region and the third region in the first direction. The third region is positioned between the second region and a second surface in the first direction. A density of the fixed charge is greater in the first region than in the second region.
According to one embodiment, a connector includes a housing, a plurality of first leads, and a metal component. The first leads are attached to the housing in alignment with each other in a first direction. Each of the first leads includes a first external terminal outside the housing. The metal component is provided with a first opening and is attached to the housing. The metal component includes two first junction terminals being aligned with the first external terminals of the first leads in the first direction outside the housing. The first opening is located in-between the two first junction terminals.
According to one embodiment, a semiconductor device includes: a first substrate; a first transistor provided on the first substrate; a light receiving element; and a light emitting element provided on the light receiving element, wherein the first substrate, the first transistor, the light emitting element, and the light receiving element are disposed sequentially in a first direction.
H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides
H01L 31/02 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails - Détails
H01L 33/56 - Matériaux, p.ex. résine époxy ou silicone
H01L 33/62 - Dispositions pour conduire le courant électrique vers le corps semi-conducteur ou depuis celui-ci, p.ex. grille de connexion, fil de connexion ou billes de soudure
42.
HEAT ASSISTED MAGNETIC RECORDING AND REPRODUCING DEVICE AND ADJUSTMENT METHOD OF THE SAME
According to one embodiment, a method of adjusting a heat assisted magnetic recording and reproducing device maintains a heat assisted magnetic recording head of the heat assisted magnetic recording and reproducing device in an on-track state, maintains a recording current for data recording below a threshold value, and applies a light source drive current emitting light to a light source.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
G11B 5/00 - Enregistrement par magnétisation ou démagnétisation d'un support d'enregistrementReproduction par des moyens magnétiquesSupports d'enregistrement correspondants
43.
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR SUBSTRATE
[Problem] To provide a semiconductor device manufacturing method and a semiconductor substrate in which a mark of the semiconductor substrate can be identified with certainty. [Solution] A semiconductor device manufacturing method according to the present embodiment involves forming a first mark (10) that is recessed in a first direction approximately orthogonal to a first surface of an SiC substrate, is surrounded on the first surface by first and third sides, extending in a second direction orthogonal to the first direction, and second and fourth sides, extending in a third direction orthogonal to the first and second directions, and has, in the first side, at least one recessed pattern recessed in the third direction from the first side toward the third side opposite the first side. An SiC layer is epitaxially grown on the first mark (10) of the SiC substrate.
G03F 9/00 - Mise en registre ou positionnement d'originaux, de masques, de trames, de feuilles photographiques, de surfaces texturées, p. ex. automatique
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
H01L 29/12 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
H01L 21/336 - Transistors à effet de champ à grille isolée
H01L 21/329 - Procédés comportant plusieurs étapes pour la fabrication de dispositifs du type bipolaire, p.ex. diodes, transistors, thyristors les dispositifs comportant une ou deux électrodes, p.ex. diodes
The present invention provides a semiconductor device in which the occurrence of destruction can be suppressed. A semiconductor device according to an embodiment of the present invention includes a first electrode, a semiconductor layer, a second electrode, a first insulating part, and a second insulating part. The semiconductor layer is provided on the first electrode. The second electrode is provided on the semiconductor layer and contains aluminum. The first insulating part includes a first portion and a second portion. The first portion is provided between the semiconductor layer and an outer peripheral part of the second electrode. The second portion is provided around the first portion along a first surface that is perpendicular to a first direction extending from the first electrode toward the semiconductor layer, and a protrusion is provided on the upper surface thereof. The second insulating part is provided on the outer peripheral part of the second electrode and the second portion.
H01L 21/336 - Transistors à effet de champ à grille isolée
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/12 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
45.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device according to an embodiment comprises: an insulating substrate having a circuit pattern; a semiconductor chip fixed onto the insulating substrate and electrically connected to the circuit pattern; and a power supply terminal containing a metal that is of the same type as the circuit pattern, the power supply terminal being electrically connected to the circuit pattern. The power supply terminal includes: a flat plate-form joint portion joined to the circuit pattern; a penetration portion penetrating the joint portion in the thickness direction of the joint portion; and an extension portion that is bent from one end portion of the joint portion and extends upward, the extension portion being configured to be capable of connecting the circuit pattern and an external device. The joint portion and the circuit pattern are joined by a bonding material containing metal particles of the same type as the power supply terminal and the circuit pattern.
H01L 23/50 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes pour des dispositifs à circuit intégré
H01L 23/12 - Supports, p. ex. substrats isolants non amovibles
[Problem] To provide a semiconductor device in which the structure is simplified and the performance is improved. [Solution] A semiconductor device according to the present embodiment comprises a first insulating substrate having a first surface and a second surface that is on the opposite side from the first surface. First and second conductive layers are provided on the first surface side. A plurality of semiconductor chips include a third surface that faces the first surface, a fourth surface that is on the opposite side from the third surface, a first electrode that is on the third surface, and a second electrode that is on the fourth surface. The first electrode is electrically connected to the first conductive layer. A common electrode plate has a fifth surface that faces the fourth surface, is electrically connected to the second electrodes of the plurality of semiconductor chips, and is electrically connected to the second conductive layer. A second insulating substrate is provided on the second surface side of the first insulating substrate.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
H01L 21/60 - Fixation des fils de connexion ou d'autres pièces conductrices, devant servir à conduire le courant vers le ou hors du dispositif pendant son fonctionnement
47.
SILICON CARBIDE EPITAXIAL WAFER AND METHOD FOR MANUFACTURING SAME
This method for manufacturing a silicon carbide epitaxial wafer comprises: a step for epitaxially growing silicon carbide at a first growth rate of 0.5-2 μm/h on a silicon carbide wafer to form a first silicon carbide layer that has a film thickness of 1-100 nm and a bump density of a first density; and a step for epitaxially growing silicon carbide at a second growth rate of more than 2 μm/h but not more than 100 μm/h on the first silicon carbide layer to form a second silicon carbide layer that has a film thickness of 4-100 μm and a bump density of a second density lower than the first density.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
C30B 25/20 - Croissance d'une couche épitaxiale caractérisée par le substrat le substrat étant dans le même matériau que la couche épitaxiale
[Problem] To provide a semiconductor device that makes it possible to improve a yield. [Solution] A semiconductor device according to an embodiment comprises: a first insulating plate; a first metal plate that is provided on a first surface of the first insulating plate; a second metal plate that is provided on a second surface on the opposite side from the first surface of the first insulating plate; a semiconductor chip that is provided on the second metal plate; and a resin member that encapsulates the semiconductor chip. In this semiconductor device, only one semiconductor chip is provided on the second metal plate.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
H01L 23/12 - Supports, p. ex. substrats isolants non amovibles
49.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
The purpose of the present invention is to provide a semiconductor device capable of suppressing a decrease in thermal conductivity, and to provide a method of manufacturing the same. According to one embodiment, the semiconductor device includes a semiconductor chip, a substrate, and an adhesive layer. The substrate supports the semiconductor chip. The adhesive layer is disposed between the semiconductor chip and the substrate. The adhesive layer bonds the semiconductor chip and the substrate. The adhesive layer has a first portion and a plurality of second portions. The first portion is formed of a first material. The plurality of second portions are formed of a second material. The second material has a higher elastic modulus and a higher thermal conductivity than the first material. The plurality of second portions are located inside the first portion. Each of the plurality of second portions is connected in contact with the semiconductor chip and the substrate.
A semiconductor device according to an embodiment is one having a first surface, which faces a first side, and a second surface, which faces a second side that is opposite from the first side. The semiconductor device according to an embodiment comprises: a semiconductor device main body; a lead frame to which the semiconductor device main body is electrically connected; electroconductive bumps electrically connected to the semiconductor device main body or the lead frame; and a resin part which covers and holds at least a part of the semiconductor device main body and at least a part of the lead frame. At least some of the electroconductive bumps are exposed to the outside of the resin part.
H01L 23/12 - Supports, p. ex. substrats isolants non amovibles
H01L 23/50 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes pour des dispositifs à circuit intégré
A method for manufacturing a semiconductor device according to one embodiment of the present invention involves processing a base material that has a first surface and a second surface opposite to the first surface. The method for manufacturing a semiconductor device according to the embodiment of the present invention comprises: forming a first trimming part by performing trimming on the base material from the first surface side; forming a second trimming part by performing trimming on the base material from the first surface side; forming an adhesive layer on the first surface by using a spin coating method that includes rotating the base material about a rotation axis line; fixing the base material to a support member via the adhesive layer; and grinding the base material from the second surface side to reduce the thickness-direction dimension of the base material. The second trimming part has a portion that is located on the inner side of the first trimming part in the radial direction centered about the rotation axis line.
A method for manufacturing a semiconductor device according to an embodiment includes a mark forming step, a first affixing step, a grinding step, and a processing step. The mark forming step is a step for forming a recess in a device surface on which there is formed a circuit pattern of a base material composed of a semiconductor material. The first affixing step is a step for affixing the device surface to a support substrate. The grinding step is a step for forming a ground surface by grinding the surface of the base material on the opposite side from the device surface in a state of being supported by the support substrate. The processing step is a step for processing the base material from the ground-surface side in a state of being supported by the support substrate. In the method for manufacturing a semiconductor device according to an embodiment, in the grinding step, the recess is exposed to the ground surface to form a mark, and in the processing step, the processing is performed with reference to the mark.
H01L 21/301 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour subdiviser un corps semi-conducteur en parties distinctes, p. ex. cloisonnement en zones séparées
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/304 - Traitement mécanique, p. ex. meulage, polissage, coupe
A semiconductor device according to one embodiment comprises a first transistor and a second transistor on a substrate, a first terminal, and a complex including a second terminal and a first insulator partially covering the second terminal. A first end of the first transistor and a second end of the second transistor are connected to each other. The first terminal includes a first portion that contacts a first conductor connected to a third end of the first transistor, a second portion connected to the first portion, and a third portion connected to the second portion. The second terminal includes a fourth portion, a fifth portion, and a sixth portion. The fourth portion contacts a second conductor connected to a fourth end of the second transistor. The fifth portion is connected to the fourth portion and is aligned with the second portion of the first terminal. The sixth portion is connected to the fifth portion. The first insulator covers the fifth portion.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
54.
SEMICONDUCTOR DEVICE, POWER DEVICE, AND POWER MODULE
A semiconductor device according to an embodiment of the present invention comprises a semiconductor chip 10 and a first conductive layer 12B provided on a first surface side of the semiconductor chip 10. The first conductive layer 12B includes an intermetallic compound layer containing copper (Cu), tin (Sn), and silver (Ag), and the concentration of silver relative to tin in the first conductive layer 12B is 1.0 at% to 7.9 at%.
H01L 23/12 - Supports, p. ex. substrats isolants non amovibles
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
55.
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
A semiconductor device (1) according to an embodiment of the present invention comprises: a chip (11) that has a first surface (S1) and a second surface (S2); a first electrode pad (12) that is provided on the first surface of the chip; a first conductive layer (14) that is provided above the first electrode pad; a first joining material (13) that is provided between the first electrode pad and the first conductive layer and that contacts the first electrode pad and the first conductive layer; and a second electrode pad (15) that is provided on the second surface of the chip. A third surface (S3) of the first joining material which faces the first electrode pad has a contact part (CP1) that contacts the first electrode pad and a cutout (NP) that surrounds the contact part. An edge of the contact part is positioned inward of an end surface of the first conductive layer.
H01L 21/60 - Fixation des fils de connexion ou d'autres pièces conductrices, devant servir à conduire le courant vers le ou hors du dispositif pendant son fonctionnement
A method of manufacturing a semiconductor device according to this embodiment includes a first film formation step of forming a first electrode layer on a base material rear surface facing a side opposite a device surface on the outer surfaces of the base material on which a circuit part is formed. The method includes a second film formation step of forming a second electrode layer on a surface of a film formation target member. The method includes a joining step of joining the first electrode layer and the second electrode layer. The method includes a film formation target member removal step for removing the film formation target member from the second electrode layer.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/285 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un gaz ou d'une vapeur, p. ex. condensation
H01L 21/288 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un liquide, p. ex. dépôt électrolytique
H01L 21/301 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour subdiviser un corps semi-conducteur en parties distinctes, p. ex. cloisonnement en zones séparées
57.
SEMICONDUCTOR DEVICE, POWER CONVERSION DEVICE, AND METHOD FOR MANUFACTURING SAME
According to an embodiment of the present invention, a semiconductor device comprises: a semiconductor chip in which a source electrode and a gate electrode are provided on a first surface, and a drain electrode is provided on a second surface on the opposite side from the first surface; a source terminal which has a fourth surface that is exposed from a third surface of the package and a fifth surface that is connected to the source electrode and that has a different shape from the fourth surface; a gate terminal which has a sixth surface that is exposed from the third surface of the package and a seventh surface that is connected to the gate electrode and that has a different shape from the sixth surface; and a drain terminal which is connected to the drain electrode and has an eighth surface that is exposed from the third surface of the package.
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
According to one embodiment, a controller of a magnetic disk device calculates a first power amount that is an amount of power required for an unload operation of a magnetic head based on a state of a VCM while the VCM is operating. The controller calculates a first set value based on the first power amount. When an amount of second data that is first data stored in a volatile memory and not yet written to a magnetic disk exceeds the first set value, the controller executes a first write operation of writing a part or all of the second data to the magnetic disk. When supply of power from outside is interrupted, the controller executes the unload operation and saving of the second data to a nonvolatile memory by using power generated by a back electromotive force of the second motor.
H02P 6/182 - Dispositions de circuits pour détecter la position sans éléments séparés pour détecter la position utilisant la force contre-électromotrice dans les enroulements
H02P 21/18 - Estimation de la position ou de la vitesse
A disk device according to one embodiment includes a magnetic disk, a magnetic head, a piezoelectric element, a flexure, a first bond, and a second bond. The piezoelectric element includes a first piezoelectric body, a first electrode and a second electrode on a first surface of the first piezoelectric body, and a third electrode on a second surface of the piezoelectric body. The third electrode is connected to the second electrode. A first pad and a second pad are disposed on an outer surface of the flexure. A first through hole is open to a part of the first pad. The first electrode and the third electrode overlap with the part. The first bond joins the first pad and the first electrode together and is partly accommodated in the first through hole. The second bond joins the second pad and the second electrode together.
According to one embodiment, in a disk device, a controller, when the rotation waiting time is present, increases an absolute value of a motor current in a fourth section in a second period in which a head is accelerated or decelerated, changes the absolute value of the motor current at a third average change rate in a fifth section after the fourth section in the second period, decreases the absolute value of the motor current at a fourth average change rate steeper than the third average change rate in a sixth section after the fifth section in the second period, and decreases the absolute value of the motor current at a fifth average change rate steeper than the fourth average change rate in a seventh section after the sixth section in the second period.
According to one embodiment, a magnetic recording device includes a magnetic head and a magnetic recording medium. The magnetic head includes a first magnetic pole, a second magnetic pole, and a magnetic element provided between the first magnetic pole and the second magnetic pole. The magnetic element includes a first magnetic layer, and a second magnetic layer provided between the first magnetic layer and the second magnetic pole. The magnetic element includes a midpoint between the first magnetic layer and the second magnetic layer in a first direction from the first magnetic pole to the second magnetic pole.
G11B 5/127 - Structure ou fabrication des têtes, p. ex. têtes à variation d'induction
G11B 5/00 - Enregistrement par magnétisation ou démagnétisation d'un support d'enregistrementReproduction par des moyens magnétiquesSupports d'enregistrement correspondants
A method for manufacturing a semiconductor device according to an embodiment includes a first film formation step, a second film formation step, and an oxidation step. In the first film formation step, a first coating film that is formed of silicon is formed on the surface of a base material that is formed of silicon carbide. In the second film formation step, a second coating film is formed on the surface of the first coating film. In the oxidation step, the first coating film is thermally oxidized from the surface side so as to form a third coating film. In the second film formation step, the second coating film is not formed on a part of the first coating film so as to expose the part. Alternatively, in the second film formation step, the film thickness of the second coating film formed on a part of the first coating film is less than the film thickness of the second coating film formed on the other parts.
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 21/31 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour former des couches isolantes en surface, p. ex. pour masquer ou en utilisant des techniques photolithographiquesPost-traitement de ces couchesEmploi de matériaux spécifiés pour ces couches
H01L 21/316 - Couches inorganiques composées d'oxydes, ou d'oxydes vitreux, ou de verres à base d'oxyde
H01L 21/318 - Couches inorganiques composées de nitrures
H01L 21/336 - Transistors à effet de champ à grille isolée
H01L 29/12 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués
63.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
This method for manufacturing a semiconductor device comprises: a step for forming, in a first region on an upper surface of a first silicon carbide layer of a first conductivity type, a second silicon carbide layer which has a first conductivity-type impurity density different from that of the first silicon carbide layer and has a first film thickness D2; a step for forming, in a second region on the upper surface, a third silicon carbide layer of a second conductivity type which has a film thickness D4; a step for forming, on the first silicon carbide layer, a fourth silicon carbide layer which has a first conductivity-type impurity density lower than that of the second silicon carbide layer and has a film thickness D1; a step for measuring, after forming the fourth silicon carbide layer, a second film thickness D3 of the second silicon carbide layer and the film thickness D1 of the fourth silicon carbide layer in a direction from the first silicon carbide layer toward the fourth silicon carbide layer; and a step for forming a trench which has a predetermined depth, and penetrates the fourth silicon carbide layer and reaches the third silicon carbide layer, on the basis of the film thickness D1 of the fourth silicon carbide layer, the first film thickness D2 and second film thickness D3 of the second silicon carbide layer, and the film thickness D4 of the third silicon carbide layer.
According to one embodiment, a semiconductor device includes a first substrate, a second substrate, a chip, and a spacer. The second substrate is provided to face the first substrate. The chip is provided on the first substrate and between the first substrate and the second substrate. The spacer is provided on the chip and couples the chip and the second substrate. The spacer has a first portion in contact with the chip and a second portion in contact with the second substrate. The second portion is larger in area than the first portion.
H01L 23/24 - Matériaux de remplissage caractérisés par le matériau ou par ses propriétes physiques ou chimiques, ou par sa disposition à l'intérieur du dispositif complet solide ou à l'état de gel, à la température normale de fonctionnement du dispositif
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
According to one embodiment, a semiconductor device includes a first insulated circuit board, a second insulated circuit board, a first semiconductor chip and a first spacer. The first insulated circuit board includes a first conductive plate. The first conductive plate has a first conductive pattern. The first spacer is placed on the first conductive pattern. The first conductive pattern has a first side, a second side, a third side and a fourth side which surround the first spacer. The first side extends in a first direction. The second side continues to the first side and extends in a second direction that is orthogonal to the first direction. The third side continues to the second side and extends in the first direction. The fourth side continues to the third side and extends obliquely to the first direction and the second direction.
H05K 1/18 - Circuits imprimés associés structurellement à des composants électriques non imprimés
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/498 - Connexions électriques sur des substrats isolants
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H05K 1/14 - Association structurale de plusieurs circuits imprimés
According to one embodiment, a disk device includes a magnetic disk, a magnetic head, a flexure, a piezoelectric element, a first bonding material, a second bonding material, and a protrusion. The flexure includes a first outer surface, a first pad, and a second pad. The first pad and the second pad are on the first outer surface. The piezoelectric element includes a second outer surface, a first electrode, and a second outer surface. The first electrode and the second electrode are on the second outer surface. The first bonding material, which is conductive, bonds the first pad and the first electrode. The second bonding material, which is conductive, bonds the second pad and the second electrode. The protrusion is provided on the flexure, is located at least partially between the first bonding material and the second bonding material, and protrudes from the first outer surface.
A computer-implemented method for preparing a disk for a disk drive for operation includes: writing first and second servo information in a first portion of a servo sector for a track of the disk; writing third and fourth servo information in a second portion of the servo sector; in a single revolution of the disk, reading a first signal associated with the first servo information, a second signal associated with the second servo information, a third signal associated with the third servo information, and a fourth signal associated with the fourth servo information; based on the first signal, the second signal, the third signal, and the fourth signal, determining a repeatable runout value for the servo sector; and storing the repeatable runout value for the servo sector in a location that is accessed during operation and used during the operation as a repeatable runout correction factor for the track.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
According to an embodiment, a controller of a magnetic disk apparatus moves a magnetic head to a first track being one of tracks on a magnetic disk. The controller acquires, in a servo sampling cycle, a positioning error amount of the magnetic head with respect to the first track. The controller executes an access to the first track by the magnetic head after a positioning error amount equal to or less than a first threshold is continuously acquired a first set number of times. The controller obtains a frequency estimation value by estimating a frequency of residual vibration of the magnetic head due to movement of the magnetic head to the first track and obtains an amplitude estimation value by estimating an amplitude of the residual vibration. The controller updates the first set number of times on the basis of the frequency estimation value and the amplitude estimation value.
G11B 33/08 - Isolation ou absorption des sons ou des vibrations indésirables
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
An embodiment provides a motor drive device including: a power conversion circuit having a configuration in which a plurality of arms including a series circuit of positive and negative semiconductor switching elements are connected in parallel to each other and configured to drive a motor; a controller configured to generate and output on/off signals for each of the semiconductor switching elements constituting the power conversion circuit by PWM control; a current detection unit configured to detect a current flowing through the power conversion circuit; a current limit unit configured to stop an operation of the controller when the current reaches a threshold; and a position estimation unit configured to estimate a rotational position of the motor using a motor current and a motor voltage, the position estimation unit being configured to correct the motor voltage used for estimation of the rotational position in a carrier cycle of the PWM control in which the operation of the controller is stopped.
H02P 21/24 - Commande par vecteur sans utilisation de détecteurs de position ou de vitesse du rotor
H02P 21/22 - Commande du courant, p. ex. en utilisant une boucle de commande
H02P 25/03 - Moteurs synchrones avec excitation sans balai
H02P 27/08 - Dispositions ou procédés pour la commande de moteurs à courant alternatif caractérisés par le type de tension d'alimentation utilisant une tension d’alimentation à fréquence variable, p. ex. tension d’alimentation d’onduleurs ou de convertisseurs utilisant des convertisseurs de courant continu en courant alternatif ou des onduleurs avec modulation de largeur d'impulsions
An isolator includes a substrate; a first planar coil provided above the substrate and along a surface of the substrate; a first insulating portion on the first planar coil; a second planar coil on the first insulating portion; and a metal layer above the first insulating portion. The first planar coil, the second planar coil, and the metal layer are arranged in a first direction perpendicular to the surface of the substrate. The first planar coil and the second planar coil each having a center and an outer perimeter in a second direction along the surface of the substrate. A distance in the second direction from the center of the first planar coil to the outer perimeter of the first planar coil is less than a distance in the second direction from the center of the second planar coil to the outer perimeter of the second planar coil.
Provided is a wafer support device capable of suppressing damage during recovery of a wafer guide. The present invention has a support base, a wafer guide portion, a first chamfered portion, and a second chamfered portion. The support base has a support surface for supporting a wafer. The wafer guide portion has an annular shape surrounding the periphery of the wafer supported on the support surface around a central axis extending in the normal direction of the support surface. The first chamfered portion connects an inner peripheral surface and an upper surface of the wafer guide portion, and extends upward from the inner peripheral surface toward an outer peripheral side. The second chamfered portion connects an outer peripheral surface and the upper surface of the wafer guide portion, and extends upward from the outer peripheral surface toward an inner peripheral side.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
C23C 16/458 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c.-à-d. procédés de dépôt chimique en phase vapeur [CVD] caractérisé par le procédé de revêtement caractérisé par le procédé utilisé pour supporter les substrats dans la chambre de réaction
A susceptor according to an embodiment is provided to a vapor-phase growth device. A wafer is placed on the susceptor. The susceptor has a wafer-supporting part. The wafer-supporting part supports the wafer. The wafer-supporting part is annular. The wafer-supporting part has a supporting surface. The supporting surface supports the wafer from beneath. The supporting surface has an inclined surface. The inclined surface extends to the inner edge of the wafer-supporting part. The inclined surface rises toward the radial-direction outer periphery of the wafer-supporting part.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
C23C 16/458 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c.-à-d. procédés de dépôt chimique en phase vapeur [CVD] caractérisé par le procédé de revêtement caractérisé par le procédé utilisé pour supporter les substrats dans la chambre de réaction
H01L 21/683 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension
The present invention provides a semiconductor device capable of improving characteristics. According to an embodiment, this semiconductor device includes first to third electrodes, and first to fourth semiconductor members. The third electrode extends along a second direction intersecting a first direction heading from the first electrode toward the second electrode. The first semiconductor member is a first conductivity type. A fifth partial region of the first semiconductor member is in Schottky contact with the second electrode. The second semiconductor member is a second conductivity type. The third semiconductor member is the second conductivity type. A third semiconductor section of the third semiconductor member is electrically connected to the second electrode. The impurity concentration of the third semiconductor member is higher than the impurity concentration of the second semiconductor member. The fourth semiconductor member is the first conductivity type. A second semiconductor region of the fourth semiconductor member is electrically connected to the second electrode. The impurity concentration of the fourth semiconductor member is higher than the impurity concentration of the first semiconductor member.
A semiconductor device according to one embodiment includes a semiconductor element, a first conductor, a first electrode, a second conductor, a second electrode, and a cover. The semiconductor element extends over a first plane, and includes a first surface, a second surface opposing the first surface, and a third surface spanning between an end of the first surface and an end of the second surface. The semiconductor element includes a first electrode pad provided in a region including the first surface, and a second electrode pad provided in a region including the second surface. The first conductor is in contact with the first electrode pad. The first electrode is in contact with the first conductor. The second conductor is in contact with the second electrode pad. The second electrode is in contact with the second conductor. The cover is a resin cover including a first portion, a second portion, and a third portion. The first portion covers the third surface. The second portion is connected to the first portion and faces the first surface. The third portion is connected to the first portion, faces the second surface, and sandwiches the semiconductor element together with the second portion.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
A semiconductor device according to an embodiment of the present invention includes: a pellet 60 that has a first surface provided with a plurality of pads 618; a first bonding material that is provided on the first surface; and a first metal plate 20 that is provided on the first bonding material, is electrically connected to the plurality of pads 618, and includes a second surface, which faces the first surface, and a plurality of protrusions 211 provided on the second surface. The plurality of protrusions 211 respectively face a pad 618A at one end and a pad 618B at another end in a direction in which a plurality of pads from among the plurality of pads 618 are arranged.
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H01L 29/12 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 29/739 - Dispositifs du type transistor, c.à d. susceptibles de répondre en continu aux signaux de commande appliqués commandés par effet de champ
According to one embodiment, a wireless communication device includes a receiver, a controller and a transmitter. The receiver receives a terminal identifier of a first terminal being a target for downlink frequency multiplexing transmission from another wireless communication device, and receives information identifying, of a plurality of frequency components, a first frequency component allocated to the first terminal. The controller selects, of a plurality second terminals belonging to the wireless communication device, a second terminal having a terminal identifier same as that of the first terminal and allocates the first frequency component to the selected second terminal. The transmitter transmits a header at a band including the plurality of frequency components, the header including the terminal identifier of the selected second terminal in a first field corresponding to the first frequency component, and transmits a first frame addressed to the selected second terminal via the first frequency component.
H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
H04B 7/0452 - Systèmes MIMO à plusieurs utilisateurs
H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
H04W 72/044 - Affectation de ressources sans fil sur la base du type de ressources affectées
H04W 72/27 - Canaux de commande ou signalisation pour la gestion des ressources entre points d’accès
H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]
The present invention provides a semiconductor device capable of improving characteristics. According to an embodiment, this semiconductor device includes first to third electrodes, first to fourth semiconductor members, and a first insulating member. The first semiconductor member is provided between the first electrode and the second electrode, and is a first conductivity type. The first semiconductor member includes a fifth partial region. The second semiconductor member is a second conductivity type. The second semiconductor member includes a first semiconductor region and a second semiconductor region. The fifth partial region is between the first semiconductor region and the second semiconductor region in a third direction. The third semiconductor member is the second conductivity type. The fourth semiconductor member is the first conductivity type.
The present invention improves reliability. A semiconductor device according to an embodiment which comprises a first member having a side wall surrounding an opening part for housing an electronic component and a receiving part provided so as to protrude from the side wall toward the opening part, and a second member which extends in a first direction, has an engagement part for mating with the receiving part, and covers at least part of the opening part, wherein: the engagement part has an extension part extending in the first direction, and a pair of engaging claws which project from the extension part at the bottom end thereof toward one end side and another end side in a second direction orthogonal to the first direction; each of the engaging claws has a first engagement surface that is angled relative to the first direction and is continuous with a side surface of the extension part that intersects the first direction; the receiving part has a pair of projecting parts that are provided so as to face each of the first engagement surfaces and include a projection surface which is angled relative to the first direction; and the lower side of the first engagement surfaces and the lower side of the projection surfaces are angled so as to become increasingly higher in a direction toward the side wall in a third direction which is orthogonal to both the first direction and the second direction.
H01L 23/04 - ConteneursScellements caractérisés par la forme
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
H05K 7/12 - Moyens élastiques ou moyens de serrage pour fixer un composant à la structure de l'ensemble
A semiconductor device according to an embodiment of the present invention comprises: a substrate 10; a case 20 that is provided on the substrate 10 and that includes a resin layer 200 and a terminal 210; and a circuit board 100 that is provided on the substrate 10 and that includes a semiconductor chip 110 and wiring 109 electrically connected to the semiconductor chip 110 and the terminal 210. The terminal 210 includes a first portion 211 extending from the resin layer 200 toward the circuit board 100, a second portion 212 joined to the wiring 109, and a third portion 213 between the first portion 211 and the second portion 212. The third portion 213 is recessed to a side opposite to the substrate 100 side relative to the second portion 212.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
80.
SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SAME
A semiconductor device according to one embodiment of the present invention involves: a step for forming, by an epitaxial growth method and on a first silicon carbide layer, a second silicon carbide layer which has a lower first conductivity type impurity concentration than the first silicon carbide layer, in which the first conductivity type impurity concentration is 1×1014-1×1017atoms/cm3, and which has a film thickness of 0.001-0.1 µm; a step for forming, by an epitaxial growth method and on the second silicon carbide layer, a third silicon carbide layer which has a first conductivity type impurity concentration of not less than 5×1017atoms/cm3but less than 1×1020atoms/cm3, and which has a film thickness of 0.5-20 µm; a step for forming, by an epitaxial growth method and on the third silicon carbide layer, a fourth silicon carbide layer which has a lower first conductivity type impurity concentration than the third silicon carbide layer; and a step for heating the first silicon carbide layer, the second silicon carbide layer, the third silicon carbide layer, and the fourth silicon carbide layer.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
H01L 21/336 - Transistors à effet de champ à grille isolée
H01L 29/12 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
81.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
The gate electrode includes a first side surface portion facing a region of a side surface of a mesa part, a second side surface portion positioned at a side opposite to the first side surface portion, a bottom portion oblique to the first and second side surface portions, the bottom portion connecting the first side surface portion and the second side surface portion, a first corner portion positioned between the first side surface portion and the bottom portion, and a second corner portion positioned between the second side surface portion and the bottom portion. An angle between a first straight line and a second straight line is not more than 60°. The first straight line is a straight line extending in a first direction and passing through the first corner portion. The second straight line is a straight line passing through the first and second corner portions.
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
H01L 29/66 - Types de dispositifs semi-conducteurs
The trench structure part includes a field plate electrode, a first insulating film, a second insulating film, the second insulating film extending to be more proximate to the first surface than the first insulating film, a gate electrode including a first portion located on the second insulating film, and a second portion located on the first insulating film, the second portion being thicker than the first portion, and a third insulating film. The gate contact part extends from the gate wiring layer toward the second portion and contacts the second portion. The gate contact part is not positioned between the first portion and the gate wiring layer. The first portion is positioned adjacent, in a second direction orthogonal to the first direction, to a lower end portion of the gate contact part contacting the second portion.
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
[Problem] To provide a semiconductor device capable of reducing the risk of thermal destruction. [Solution] This semiconductor device comprises: a first electrode; a second electrode facing the first electrode in a first direction; a semiconductor layer of a first conductivity type provided between the first electrode and the second electrode; a plurality of first semiconductor regions of a second conductivity type provided on a first electrode side in the semiconductor layer and extending in a second direction orthogonal to the first direction; a plurality of second semiconductor regions provided on a surface side of the plurality of first semiconductor regions and having an impurity concentration of the second conductivity type higher than that of the first semiconductor regions; and a plurality of PIN diode regions provided on the first electrode side in the semiconductor layer, extending in a third direction orthogonal to the first direction and the second direction, and electrically connected to at least one of the plurality of first semiconductor regions and at least one of the plurality of second semiconductor regions.
One embodiment provides a detection circuit that has a comparison circuit and a signal generation circuit. The comparison circuit has a first input node, a second input node, and an output node. The first input node is connected to one end of a power device. The second input node is connected to a threshold voltage. The signal generation circuit has a first input node and an output node. The first input node is connected to the output node of the comparison circuit. The output node is connected to a control node of a protection circuit of the power device.
H03K 17/082 - Modifications pour protéger le circuit de commutation contre la surintensité ou la surtension par réaction du circuit de sortie vers le circuit de commande
H03K 17/08 - Modifications pour protéger le circuit de commutation contre la surintensité ou la surtension
A semiconductor device of an embodiment of the present invention comprises a transistor region and a diode region. The transistor region includes: a n-type first silicon carbide region having a first portion in contact with a first surface; a plurality of p-type second silicon carbide regions; a n-type third silicon carbide region; a plurality of p-type fourth silicon carbide regions interconnecting the second silicon carbide regions; a first electrode; a second electrode and a gate electrode. The diode region includes: a n-type first silicon carbide region having a second portion in contact with the first surface; p-type fifth silicon carbide regions; a plurality of p-type sixth silicon carbide regions interconnecting the fifth silicon carbide regions; a first electrode; and a second electrode. Furthermore, a seventh silicon carbide region connecting the third silicon carbide region and the fifth silicon carbide region is included.
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/12 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués
Provided is a semiconductor device capable of improving characteristics. This semiconductor device according to an embodiment includes a first electrode, a first conductive member, a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type. The first semiconductor region is provided between the first electrode and the first conductive member. The first semiconductor region includes first to third partial regions. The first semiconductor region and the first conductive member are Schottky-joined. The second semiconductor region includes a plurality of first portions extending along the first direction, a plurality of second portions extending along the second direction, and a third portion. The third portion is provided around the plurality of second portions and is continuous with the plurality of second portions. The first partial region is provided between the first electrode and the plurality of first portions and between the first electrode and the second partial region. The second partial region is provided between one of the plurality of first portions and another one of the plurality of first portions.
A semiconductor device according to an embodiment of the present invention includes: a SiC layer having a first surface formed from a silicon surface and a second surface formed from a carbon surface; a plurality of protrusions each having a side surface connecting to a top surface, a part of the first surface serving as the top surface; a first electrode forming a Schottky junction with the plurality of protrusions; a second electrode on the second surface; a first semiconductor region of a first conductivity type provided in the SiC layer; a second semiconductor region of a second conductivity type provided in the SiC layer between the plurality of protrusions and positioned between the first semiconductor region and the first electrode; and a third semiconductor region of the first conductivity type provided on the side surface of the protrusion, positioned between the first electrode and the first semiconductor region in the protrusion, and having a higher impurity concentration of the first conductivity type than the first semiconductor region.
[Problem] To provide a semiconductor device capable of having improved reliability. [Solution] A semiconductor device according to one embodiment of the present invention comprises: a first electrode; a second electrode opposing the first electrode in a first direction; a semiconductor part provided between the first and second electrodes; a metal silicide layer provided between the second electrode and the semiconductor part; and a metal layer provided between the metal silicide layer and the second electrode. The metal silicide layer has recesses that are recessed toward the semiconductor part. The metal layer is in contact with the bottom and side surfaces of the recesses.
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 21/28 - Fabrication des électrodes sur les corps semi-conducteurs par emploi de procédés ou d'appareils non couverts par les groupes
H01L 21/336 - Transistors à effet de champ à grille isolée
H01L 29/12 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués
H01L 29/41 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
89.
TEMPERATURE COMPENSATION CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR DEVICE, AND TEMPERATURE COMPENSATION METHOD
According to one embodiment, there is provided a temperature compensation circuit having a correction circuit and a voltage supply circuit. The correction circuit has a first input node, a second input node, and an output node. The first input node is connected to a temperature sensor near a power device. The second input node is connected to a control terminal of the power device. The voltage supply circuit has an input node and an output node. The input node is connected to the output node of the correction circuit. The output node is connected to a second input node of the comparison circuit. The comparison circuit has a first input node and the second input node. The first input node is connected to one end of the power device.
H03K 17/082 - Modifications pour protéger le circuit de commutation contre la surintensité ou la surtension par réaction du circuit de sortie vers le circuit de commande
H02M 1/00 - Détails d'appareils pour transformation
The semiconductor device according to an embodiment comprises: an insulating substrate; a frame body; a first upper electrode; a first lower electrode; and a first semiconductor layer. The semiconductor device further comprises: a first semiconductor chip on the insulating substrate; a first electrode terminal that contains a first flat plate portion and that is electrically connected to one of the first upper electrode or the first lower electrode; a second electrode terminal that contains a second flat plate portion facing the first flat plate portion and that is electrically connected to the other of the first upper electrode or the first lower electrode; a first resin member that is fixed to at least one of the first electrode terminal and the second electrode terminal and that contains a fitting portion fitted into the frame body, wherein the fitting portion contains a first resin having a first volume resistivity and a first Young's modulus; and a second resin member that is provided between the first flat plate portion and the second flat plate portion and contains a second resin having a second volume resistivity greater than the first volume resistivity and a second Young's modulus greater than the first Young's modulus.
According to one embodiment, a magnetic disk device includes a base having a pedestal, a magnetic disk, an actuator that supports and drives a head, and a ramp that is provided on the pedestal and holds the head in an unloading position. The pedestal has a first face, a first hole provided in the first face, a support sleeve disposed on the first face and coaxial with the screw hole, and a recess provided in the support sleeve. The ramp has a guide face that supports the head, a second face opposing the first face, a second hole opened in the second face and configured to receive the support sleeve, and a protrusion that engages with the recess and regulates a pivoting of the ramp around the support sleeve, and is fixed to the pedestal using a fastener that is passed through the second hold and into the first hole.
G11B 5/48 - Disposition ou montage des têtes par rapport aux supports d'enregistrement
G11B 5/54 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour amener la tête dans sa position de travail, pour l'en écarter ou pour la déplacer en travers des pistes
92.
Magnetic disk device and method of detecting flying height of magnetic head
According to one embodiment, a magnetic disk device comprising a magnetic head expanding to the magnetic disk side with the generated heat of a heater, a flying height measurement unit measuring a flying height of the magnetic head, based on a read signal of the magnetic head for data for measuring flying height written to the magnetic disk, and a controller. The controller detects variation of a measurement value of the flying height measurement unit, based on change of “correspondence between a change amount of the supply power and a measurement value of the flying height measurement unit”.
G11B 5/58 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support
G11B 5/60 - Maintien dynamique de l'écartement entre têtes et supports d'enregistrement à l'aide d'un fluide
A disk device according to one embodiment includes magnetic disks, arms each with a first depression, suspensions, and first dampers. The magnetic disks are aligned along a first rotation axis. The arms are aligned along a second rotation axis. Each arm includes a first side surface, a second side surface with a slit, a first surface, a second surface, a first seating surface, and a second seating surface. The first depression is open to the first side surface and the first surface, and located closer to the first rotation axis than the slit. Each of the suspensions is supported by the first seating surface or the second seating surface and partially accommodated in the slit. Each of the first dampers is attached to each of the arms along the first depression.
According to one embodiment, a disk device includes a housing with a bottom wall, magnetic disks supported on a hub of a motor, a printed circuit board provided on an outer surface of the bottom wall, and a wiring board attached on the outer surface of the bottom wall. The bottom wall includes a recess formed in the outer surface, a step located on border between the outer surface and the recess, and through holes opened to the recess. The wiring board includes one end portion disposed in the recess and connection pads on the one end portion, connected to lead wires of a coil. An adhesive is filled into the recess and the through holes, and covers the one end and a solder joint and seals the through holes.
G11B 25/04 - Appareils caractérisés par la forme du support d'enregistrement employé mais non spécifiques du procédé d'enregistrement ou de reproduction utilisant des supports d'enregistrement plats, p. ex. disques, cartes
G11B 33/04 - ÉbénisterieBoîtiersBâtisDisposition des appareils dans ou sur ceux-ci modifiés pour le rangement des supports d'enregistrement
G11B 33/14 - Diminution de l'influence des paramètres physiques, p. ex. changements de température, humidité, poussière
95.
Magnetic disk device and method of controlling magnetic disk device
According to one embodiment, a magnetic disk device includes a magnetic disk, a magnetic head, and a controller including an offtrack write table, positioning the magnetic head, and registering an address at which data in a track is written and a positioning error of the magnetic head at the address for the track, in the offtrack write table. When writing data to a first sector, the controller corrects a positioning target position of the first sector, based on a positioning error of a second sector located on two tracks away in a radial direction from the first sector.
G11B 5/54 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour amener la tête dans sa position de travail, pour l'en écarter ou pour la déplacer en travers des pistes
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
According to an embodiment, tracks on a magnetic disk each include a long-distance sector having a length in the circumferential direction covering two or more servo sectors. A controller executes an acquisition operation to acquire one or more evaluation amounts on the basis of a track pitch in each of the two or more servo sectors included in a portion adjacent to the long-distance sector. The controller executes a protection operation to protect data of an adjacent track in a case where a total value of the one or more evaluation amounts exceeds a first threshold value.
G11B 5/00 - Enregistrement par magnétisation ou démagnétisation d'un support d'enregistrementReproduction par des moyens magnétiquesSupports d'enregistrement correspondants
G11B 5/02 - Procédés d'enregistrement, de reproduction ou d'effacementCircuits correspondants pour la lecture, l'écriture ou l'effacement
G11B 5/55 - Changement, sélection ou acquisition de la piste par déplacement de la tête
G11B 20/12 - Mise en forme, p. ex. disposition du bloc de données ou de mots sur les supports d'enregistrement
According to one embodiment, a semiconductor device includes a pellet; a first conductor and a second conductor between which the pellet is interposed in a first direction; a first bonding material that bonds the pellet and the first conductor; and a second bonding material that bonds the pellet and the second conductor. A first surface of the first conductor facing the pellet has a depression.
A semiconductor device according to an embodiment includes a gate electrode extending in a first direction, a gate insulation film that covers the gate electrode, a first semiconductor region of a first conductivity type extending in a second direction orthogonal to the first direction below the gate insulation film, and a second semiconductor region of the first conductivity type that faces the gate insulation film across the first semiconductor region. An impurity concentration of the first conductivity type of the second semiconductor region is lower than that of the first semiconductor region.
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
99.
MAGNETIC DISK DEVICE, METHOD OF CONTROLLING MAGNETIC DISK DEVICE, AND COMPUTER PROGRAM PRODUCT
According to one embodiment, a magnetic disk device includes a first MA amplifier that drives a first micro actuator that positions a corresponding magnetic head, a second micro actuator that positions a corresponding magnetic head, a second MA amplifier that drives the second micro actuator, and a controller that, when performing switching from an MA amplifier of a switching source in an on state to an MA amplifier of a switching destination in an off state, starts up the MA amplifier of the switching destination while maintaining the MA amplifier of the switching source in the on state, and performs the switching from the MA amplifier of the switching source to the MA amplifier of the switching destination after a predetermined time elapses.
According to one embodiment, a controller of a magnetic disk apparatus operates in a first operation of writing to data regions on a magnetic disk of the magnetic disk apparatus while positioning a magnetic head. In the first operation, the controller demodulates burst patterns to obtain a first burst demodulated value set and corrects the first burst demodulated value set to obtain a second burst demodulated value set. The first burst demodulated value set is corrected on the basis of a correction algorithm using a first set value as an argument. The controller calculates, on the basis of the second burst demodulated value set, an offset amount of the magnetic head from one of servo tracks on the magnetic disk.
G11B 5/55 - Changement, sélection ou acquisition de la piste par déplacement de la tête
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
