Lansus Technologies Inc.

Chine

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Type PI
        Brevet 276
        Marque 6
Juridiction
        International 259
        États-Unis 20
        Europe 3
Date
Nouveautés (dernières 4 semaines) 1
2026 avril (MACJ) 1
2026 février 2
2026 janvier 8
2025 décembre 2
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Classe IPC
H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs 41
H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs 36
H03F 3/19 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs 33
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire 28
H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs 20
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Statut
En Instance 1
Enregistré / En vigueur 281
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1.

POWER-AMPLIFIER OUTPUT STANDING WAVE ALARM CIRCUIT, AND RADIO-FREQUENCY MODULE

      
Numéro d'application CN2025125369
Numéro de publication 2026/077308
Statut Délivré - en vigueur
Date de dépôt 2025-09-29
Date de publication 2026-04-16
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Liu, Bo
  • Li, Huanhuan
  • Guo, Jiashuai

Abrégé

The present utility model relates to a power-amplifier output standing wave alarm circuit, and a radio-frequency module. The power-amplifier output standing wave alarm circuit comprises a power amplifier, a switch control circuit, a controller, and a coupling circuit, wherein an input end of the power amplifier is used for connecting a radio-frequency signal, and an output end thereof is connected to a control end of the switch control circuit and outputs a radio-frequency amplified signal to the switch control circuit; the switch control circuit is used for switching the radio-frequency amplified signal to different paths and outputting same; the coupling circuit comprises a coupler and a processing circuit, the coupler being used for acquiring the radio-frequency amplified signal, and the processing circuit being used for processing the radio-frequency amplified signal to obtain a determination signal; and an input end of the controller is connected to the coupling circuit, an output end of the controller is connected to the power amplifier, and the controller is used for receiving the determination signal and controlling, on the basis of the determination signal, the power amplifier to turn on and off. The present utility model has the technical effects of standing-wave anomaly detection and the protection of a power amplifier.

Classes IPC  ?

  • H03F 3/24 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie

2.

OPTIMIZATION METHOD FOR IMPEDANCE MATCHING AND SURFACE ACOUSTIC WAVE FILTER

      
Numéro d'application CN2025103962
Numéro de publication 2026/040602
Statut Délivré - en vigueur
Date de dépôt 2025-06-26
Date de publication 2026-02-26
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Yuan, Junping
  • Zhang, Lei
  • Zhu, Yuquan
  • Guo, Jiashuai

Abrégé

The present invention provides an optimization method for impedance matching and a surface acoustic wave filter. The optimization method comprises the following steps: step S1, obtaining corresponding scattering parameter information, and screening the scattering parameter information on the basis of a set frequency range; step S2, determining an impedance matching circuit that needs to be added for each port; step S3, by taking the reflection circle radius of a scattering parameter of each port as a first optimization objective, performing optimization to obtain a first optimization result of each port; step S4, by taking the first optimization result of each port as an initial value and taking maximum insertion within the set frequency range and the reflection circle radius of the scattering parameter of each port as second optimization objectives, performing optimization again to obtain a second optimization result; and step S5, evaluating the second optimization result. The optimization method of the present invention can improve the optimization speed, reduce the likelihood of optimization falling into a local optimum, and accelerate the convergence speed.

Classes IPC  ?

  • H03H 7/38 - Réseaux d'adaptation d'impédance
  • H03H 11/28 - Réseaux d'adaptation d'impédance
  • H03H 9/64 - Filtres utilisant des ondes acoustiques de surface

3.

SURFACE ACOUSTIC WAVE DEVICE MODEL COEFFICIENT EXTRACTION AND SIMULATION METHOD AND APPARATUS, AND RELATED DEVICE

      
Numéro d'application CN2025103933
Numéro de publication 2026/026335
Statut Délivré - en vigueur
Date de dépôt 2025-06-26
Date de publication 2026-02-05
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhong, Yan
  • Zhang, Lei
  • Yuan, Junping
  • Zhou, Wenhan
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of wireless communications. Disclosed are a surface acoustic wave device model coefficient extraction and simulation method and apparatus, and a related device. The method comprises the following steps: step S1, acquiring admittance parameters of a batch of surface acoustic wave devices; step S2, removing abnormal waveforms and random noise in measured curves by means of a filtering and noise reduction algorithm, so as to obtain true values of the measured curves; step S3, searching for feature information in the measured curves by using a moving window of a preset size in combination with a preset limiting condition; step S4, on the basis of a feature change relationship between the coefficient of a phenomenological model and each of the conductance of a conductance curve and the susceptance of a susceptance curve, sequentially optimizing all model coefficients step by step; and step S5, using a neural network model to develop a simulation method for surface acoustic wave devices within a preset structural dimension range and obtain a simulation result. The surface acoustic wave device model coefficient extraction and simulation method of the present invention can improve the accuracy of surface acoustic wave device simulation.

Classes IPC  ?

  • G06F 30/36 - Conception de circuits au niveau analogique

4.

SCATTERING PARAMETER THERMAL COUPLING METHOD AND SYSTEM, AND RELATED APPARATUS

      
Numéro d'application CN2025103877
Numéro de publication 2026/021120
Statut Délivré - en vigueur
Date de dépôt 2025-06-26
Date de publication 2026-01-29
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhou, Wenhan
  • Zhu, Yuquan
  • Guo, Jiashuai

Abrégé

Provided in the present invention are a scattering parameter thermal coupling method and system, and a related apparatus. The method comprises: constructing a three-dimensional equivalent heat transfer model for a target device; acquiring an ambient thermal resistance of the target device on the basis of the three-dimensional equivalent heat transfer model; acquiring a scattering matrix Si of each element; coupling a temperature drift coefficient of the device with scattering matrices to obtain coupled scattering matrices Si'; performing electrical connection on the basis of connection modes of different elements in the device, so as to obtain an electrical model; coupling the electrical model with the ambient thermal resistance by means of a corresponding dissipation power, so as to establish a power model; calculating a temperature corresponding to each coupled scattering matrix Si'; on the basis of the temperature, adjusting the scattering matrix Si by using a preset adjustment method, so as to obtain an adjusted matrix Si''; and determining whether Si'' minus Si' is equal to 0, and if Si'' minus Si' is equal to 0, outputting the power model as a scattering parameter thermal coupling result. The present method more closely aligns with test conditions of actual devices, resulting in more accurate temperature drift prediction results.

Classes IPC  ?

  • G06F 30/20 - Optimisation, vérification ou simulation de l’objet conçu

5.

INTERDIGITAL TRANSDUCER AND PREPARATION METHOD THEREFOR, AND SURFACE ACOUSTIC WAVE FILTER

      
Numéro d'application CN2025103913
Numéro de publication 2026/021121
Statut Délivré - en vigueur
Date de dépôt 2025-06-26
Date de publication 2026-01-29
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Li, Shuai
  • Zhang, Lei
  • Zhou, Wenhan
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of wireless communications, and particularly relates to an interdigital transducer and a preparation method therefor, and a surface acoustic wave filter. The preparation method comprises the following steps: performing two rounds of photoresist spin-coating and two rounds of a hard-baking treatment on a wafer, performing an exposure treatment, developer spin-coating and a film deposition treatment, and stripping a photoresist, so as to obtain an interdigital transducer. Compared with the prior art, in the present invention, two layers of photoresist are applied to a wafer, wherein the physical properties of the two layers of photoresist are different, such that in a subsequent developer spin-coating process, the remaining structure of the upper layer of photoresist is larger than that of the lower layer of photoresist, thereby forming a T-shaped-like photoresist structure. Therefore, when film deposition is performed on the wafer, a gap is formed between a metal film and the lower layer of photoresist, thereby effectively preventing the photoresist from adhering to the periphery of the metal film, which causes incomplete stripping, and thus the electrical performance and reliability of an interdigital transducer and a surface acoustic wave filter thereof are effectively improved.

Classes IPC  ?

  • H03H 3/08 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface
  • H03H 9/145 - Moyens d'excitation, p. ex. électrodes, bobines pour réseaux utilisant des ondes acoustiques de surface
  • H03H 9/64 - Filtres utilisant des ondes acoustiques de surface
  • H10N 30/082 - Mise en forme ou usinage de corps piézo-électriques ou électrostrictifs par gravure, p. ex. par lithographie

6.

EDGE CONTRACTION TECHNIQUE-BASED CIRCUIT PREPROCESSING METHOD AND SYSTEM, AND RELATED DEVICE

      
Numéro d'application CN2025103822
Numéro de publication 2026/021117
Statut Délivré - en vigueur
Date de dépôt 2025-06-26
Date de publication 2026-01-29
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Guan, Peng
  • Zhou, Wenhan
  • Yuan, Junping
  • Zhong, Yan
  • Guo, Jiashuai

Abrégé

An edge contraction technique-based circuit preprocessing method and system, and a device. The method comprises: on the basis of an original equivalent circuit, constructing a circuit connection list about connection relationships between different circuit elements therein (S1); traversing the circuit connection list, performing mergeability determination on different connection relationships on the basis of an edge contraction method, and reordering the connection relationships in the circuit connection list to obtain an ordered circuit connection list (S2); traversing the ordered circuit connection list, performing mergeability determination on different connection relationships on the basis of the edge contraction method, and merging the connection relationships in the ordered circuit connection list to obtain a merged circuit connection list (S3); and connecting different circuit elements on the basis of the merged circuit connection list, to obtain a simplified equivalent circuit (S4). The edge contraction technique-based circuit preprocessing method reduces the calculation time of a circuit scattering parameter matrix.

Classes IPC  ?

  • G06F 30/20 - Optimisation, vérification ou simulation de l’objet conçu

7.

POWER AMPLIFIER AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2025103846
Numéro de publication 2026/021119
Statut Délivré - en vigueur
Date de dépôt 2025-06-26
Date de publication 2026-01-29
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Shao, Yixiang
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of wireless communications. Disclosed in the present invention is a power amplifier. The power amplifier comprises a signal input end, a radio frequency amplifier and a signal output end which are electrically connected in sequence, and an average power tracking circuit. An input end of the average power tracking circuit is used for connecting a power supply and receiving an output signal of an external host computer, an output end of the average power tracking circuit is connected to an input end of a radio frequency amplifier, and the average power tracking circuit is used for converting, on the basis of a received target voltage value, a power supply voltage output by the power supply into a preset voltage to supply power to the radio frequency amplifier. The average power tracking circuit comprises a voltage conversion circuit, a comparator, a loop filter circuit, a PWM modulator, a voltage divider circuit, a pulse circuit, and a first inductor. By switching the characteristics of the loop filter, the present invention enables the power supply to achieve both fast establishment and high-precision output, thereby allowing a working voltage of the amplifier to be as low as possible, and further reducing power consumption of the power amplifier.

Classes IPC  ?

  • H03F 3/20 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C
  • H03F 3/193 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs comportant des dispositifs à effet de champ
  • H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire

8.

FILTER AND FABRICATION METHOD THEREFOR

      
Numéro d'application CN2025098150
Numéro de publication 2026/001549
Statut Délivré - en vigueur
Date de dépôt 2025-05-29
Date de publication 2026-01-02
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Li, Shuai
  • Zhang, Lei
  • Zhou, Wenhan
  • Guo, Jiashuai

Abrégé

The present invention provides a filter and a fabrication method therefor, the method comprising the steps of: S1, fabricating an acoustic layer on one side of a piezoelectric wafer; S2, depositing and forming a dielectric layer on the side of the piezoelectric wafer close to the acoustic layer; S3, planarizing the dielectric layer; S4, using photoresist to perform first protective bonding on the planarized dielectric layer corresponding to a low-frequency functional area or a high-frequency functional area; S5, performing first frequency trimming on the dielectric layer corresponding to the functional area in which first protective bonding is not performed; S6, using photoresist to perform second protective bonding on the dielectric layer corresponding to the functional area in which first frequency trimming was performed; and S7, performing second frequency trimming on the dielectric layer corresponding to the functional area in which second protective bonding is not performed. The resulting filter fabricated by means of the described method can meet the thickness requirements of different dielectric layers, thereby allowing each frequency band thereof to achieve better performance.

Classes IPC  ?

  • H03H 3/10 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface pour obtenir une fréquence ou un coefficient de température désiré
  • H03H 9/64 - Filtres utilisant des ondes acoustiques de surface
  • H10N 30/082 - Mise en forme ou usinage de corps piézo-électriques ou électrostrictifs par gravure, p. ex. par lithographie

9.

MANUFACTURING METHOD FOR LATERALLY EXCITED BULK ACOUSTIC WAVE FILTER, AND RADIO-FREQUENCY MODULE

      
Numéro d'application CN2025098095
Numéro de publication 2026/001542
Statut Délivré - en vigueur
Date de dépôt 2025-05-29
Date de publication 2026-01-02
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Li, Xin
  • Zhang, Lei
  • Li, Shuai
  • Guo, Jiashuai
  • Xuan, Kai

Abrégé

The present invention is applicable to the technical field of semiconductor processes, and particularly relates to a manufacturing method for a laterally excited bulk acoustic wave filter, and a radio-frequency module. The manufacturing method uses the respective excellent characteristics of silicon-based glass and photosensitive glass so as to obtain crystallized glass as a sacrificial layer by means of exposing and annealing the photosensitive glass during manufacturing, thereby implementing pattern transfer. This process does not involve cavity lithography, etching or coating, thus reduces process steps, thereby reducing difficulty and costs, and improving the yield and structural stability of a filter; in addition, crystallized glass and uncrystallized photosensitive glass have high etching selectivity and extremely low parasitic resistance and capacitance, so that cavity etching can be simply and accurately controlled so as to obtain an ideal cavity structure, and device insertion loss can be reduced to improve the overall performance of the filter.

Classes IPC  ?

  • H03H 3/04 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux piézo-électriques ou électrostrictifs pour obtenir une fréquence ou un coefficient de température désiré

10.

FILTER AND PREPARATION METHOD THEREFOR

      
Numéro d'application CN2025098107
Numéro de publication 2026/001544
Statut Délivré - en vigueur
Date de dépôt 2025-05-29
Date de publication 2026-01-02
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Li, Shuai
  • Zhang, Lei
  • Zhou, Wenhan
  • Guo, Jiashuai

Abrégé

Provided in the present invention are a filter and a preparation method therefor. The method comprises the steps of: S1, preparing an acoustic layer on one side of a piezoelectric wafer; S2, depositing a dielectric layer on the side of the piezoelectric wafer that is close to the acoustic layer; S3, performing a first instance of planarization on the dielectric layer; S4, using a photoresist to affix and protect a low-frequency functional area portion that corresponds to the dielectric layer; S5, performing frequency trimming on a high-frequency functional area portion that corresponds to the dielectric layer; S6, using the photoresist to affix and protect the high-frequency functional area portion that corresponds to the dielectric layer; S7, performing a second instance of planarization on the dielectric layer that corresponds to the low-frequency functional area portion; and S8, cleaning off all the photoresist to obtain a filter. The filter prepared by means of the method can meet thickness requirements for different dielectric layers, so that each frequency band thereof can achieve optimal performance.

Classes IPC  ?

  • H03H 3/10 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface pour obtenir une fréquence ou un coefficient de température désiré

11.

NOTCH FILTER

      
Numéro d'application CN2025098165
Numéro de publication 2026/001550
Statut Délivré - en vigueur
Date de dépôt 2025-05-29
Date de publication 2026-01-02
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhang, Lei
  • Ling, Chenglei
  • Guo, Jiashuai

Abrégé

Provided in the present invention is a notch filter. The notch filter comprises a signal input end, first laterally excited bulk acoustic wave resonators connected in series with the signal input end, resonator assemblies connected in parallel to the first laterally excited bulk acoustic wave resonators, and a signal output end connected in series with the first laterally excited bulk acoustic wave resonators, wherein each resonator assembly comprises two second laterally excited bulk acoustic wave resonators that are respectively grounded; a first laterally excited bulk acoustic wave resonator is connected between two second laterally excited bulk acoustic wave resonators in a resonator assembly, and the three laterally excited bulk acoustic wave resonators are jointly arranged in a T shape; and the resonant frequency of each first laterally excited bulk acoustic wave resonator is less than the resonant frequency of each second laterally excited bulk acoustic wave resonator. In the present invention, by means of designing first laterally excited bulk acoustic wave resonators that are connected in series and resonator assemblies that are connected in parallel, a notch filter for realizing high-frequency, high-degree-of-suppression and large-bandwidth filtering is obtained.

Classes IPC  ?

  • H03H 9/54 - Filtres comprenant des résonateurs en matériau piézo-électrique ou électrostrictif
  • H03H 9/205 - Détails de réalisation de résonateurs se composant de matériau piézo-électrique ou électrostrictif ayant des résonateurs multiples

12.

IMPEDANCE CIRCUIT SELF-MATCHING OPTIMIZATION METHOD AND SYSTEM, AND RELATED DEVICE

      
Numéro d'application CN2025098070
Numéro de publication 2025/261128
Statut Délivré - en vigueur
Date de dépôt 2025-05-29
Date de publication 2025-12-26
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Zhang, Lei
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of wireless communications. Provided are an impedance circuit self-matching optimization method and system, and a related device. The method comprises the following steps: S1, reading an SNP file of a filter and generating corresponding port networks and operating frequency bands; S2, performing circuit pre-estimation optimization on each port network, and recording optimization results of all the port networks; S3, perform screening on each port network on the basis of a preset rule, so as to obtain a plurality of screening results; S4, assembling overall matching circuits on the basis of the plurality of screening results, and obtaining a plurality of circuit optimization results; and S5, screening the plurality of circuit optimization results to obtain an optimal matching circuit. The impedance circuit self-matching optimization method in the present invention can improve the optimization efficiency of a SAW matching circuit and the operating electrical performance of a SAW.

Classes IPC  ?

  • G06F 30/373 - Optimisation de la conception
  • G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation

13.

RADIO FREQUENCY FRONT-END MODULE AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2025098038
Numéro de publication 2025/251998
Statut Délivré - en vigueur
Date de dépôt 2025-05-29
Date de publication 2025-12-11
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Shao, Yixiang
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of wireless communications. Disclosed in the present invention is a radio frequency front-end module, comprising a signal input end, an input matching circuit, an amplification circuit, an output matching circuit, and a signal output end which are electrically connected in sequence. The radio frequency front-end module further comprises a bias circuit, wherein a first end of the bias circuit is used for connecting to a power supply, a second end of the bias circuit is used for connecting to an external logic control circuit, and a third end of the bias circuit is used for outputting a bias current to an input end of the amplification circuit; the external logic control circuit is used for controlling on-off of the amplification circuit; and the bias circuit comprises a current mirror circuit, a first transistor , a second transistor , a third transistor , a first resistor, a second resistor, and a third resistor. The present invention can improve the IIP3 performance of the entire radio frequency front-end module.

Classes IPC  ?

14.

TEMPERATURE CHARACTERISTIC ITERATIVE SIMULATION METHOD AND SYSTEM FOR ELASTIC WAVE DEVICE, AND RELATED DEVICE

      
Numéro d'application CN2025091922
Numéro de publication 2025/241854
Statut Délivré - en vigueur
Date de dépôt 2025-04-29
Date de publication 2025-11-27
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhou, Wenhan
  • Guan, Peng
  • Zhu, Yuquan
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of piezoelectric simulation, particularly relates to a temperature characteristic iterative simulation method and system for an elastic wave device, and a related device. The temperature characteristic iterative simulation method for an elastic wave device provided by the present invention takes into consideration the impact of self-heating of the elastic wave device on the device performance as well as the heat transfer condition of the environment where the device is located, and achieves full coupling of solid mechanics, static electricity and a heat transfer field by means of iterative optimization of solutions across simulation models, thus improving the prediction capability for the temperature drift performance of devices in a simulation design stage, and the accuracy of temperature drift simulation of acoustic devices.

Classes IPC  ?

  • G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]

15.

BENDING RELIABILITY TEST FIXTURE, SYSTEM AND METHOD

      
Numéro d'application CN2025091930
Numéro de publication 2025/241855
Statut Délivré - en vigueur
Date de dépôt 2025-04-29
Date de publication 2025-11-27
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Luo, Weixia
  • Zhou, Wenhan
  • Xie, Xiaohuan
  • Chen, Yun
  • Guo, Jiashuai

Abrégé

A bending reliability test fixture, system and method. The bending reliability test fixture comprises a first force-bearing component (1) and a second force-bearing component (2) which are structurally identical and symmetrically spaced apart; the first force-bearing assembly (1) comprises a force-bearing plate (11), a clamping part (12) formed by protruding and extending from the middle area of one side of the force-bearing plate (11), a fixing slot (13) formed by recessing inwards from the end of the clamping part (12) away from the force-bearing plate (11), a fixed rotating shaft (14) fixed to the middle area of the side of the force-bearing plate (11) away from the clamping part (12), and a first transverse force-bearing beam (15) and a second transverse force-bearing beam (16), which are respectively fixed to the side of the force-bearing plate (11) away from the clamping part (12) and spaced apart on the upper and lower opposite sides of the fixed rotating shaft (14), and the fixing slot (13) is used for clamping a circuit board sample (3); the clamping part (12) of the first force-bearing component (1) and a clamping part of the second force-bearing component (2) are arranged directly facing each other. By adopting the bending reliability test fixture of the present invention, a bending reliability test can be simply and efficiently carried out on a circuit board sample, and meanwhile, the accuracy of a test result is improved.

Classes IPC  ?

  • G01N 3/20 - Recherche des propriétés mécaniques des matériaux solides par application d'une contrainte mécanique en appliquant des efforts permanents de flexion

16.

ACOUSTIC COMPONENT TEMPERATURE DRIFT PREDICTION METHOD AND SYSTEM AND RELATED DEVICE

      
Numéro d'application CN2025091907
Numéro de publication 2025/241853
Statut Délivré - en vigueur
Date de dépôt 2025-04-29
Date de publication 2025-11-27
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhou, Wenhan
  • Li, Shuai
  • Zhang, Lei
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of wireless communications, and particularly relates to an acoustic component temperature drift prediction method and system and a related device. The present invention comprises: by means of a prearranged method, modifying material parameters of a first two-dimensional simulation model; under conditions of a prearranged input signal frequency, a prearranged environmental temperature and prearranged input power, performing acoustic simulation on a second two-dimensional simulation model; substituting component loss data into a three-dimensional equivalent model for steady-state heat transfer simulation; substituting an actual operating temperature into the second two-dimensional simulation model for calculation; and, on the basis of first admittance data and second admittance data, predicting the temperature drift of an acoustic component. The present invention uses multi-field coupling and solution inheritance of solid mechanics, electrostatics and heat transfer, and takes into account the effect of the self-heating of acoustic components on component performance and heat transfer conditions of environments where the components are located, thus effectively improving the capability of predicting the temperature drift performance of the acoustic components, greatly reducing resource consumption in component design, and accelerating product iteration.

Classes IPC  ?

  • G06F 119/02 - Analyse de fiabilité ou optimisation de fiabilitéAnalyse de défaillance, p. ex. performance dans le pire scénario, analyse du mode de défaillance et de ses effets [FMEA]
  • G06F 30/20 - Optimisation, vérification ou simulation de l’objet conçu

17.

METHOD AND SYSTEM FOR DETERMINING RADIUS OF REFLECTION CIRCLE OF SURFACE ACOUSTIC WAVE FILTER, AND RELATED DEVICE

      
Numéro d'application CN2025091654
Numéro de publication 2025/237064
Statut Délivré - en vigueur
Date de dépôt 2025-04-28
Date de publication 2025-11-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Yuan, Junping
  • Zhang, Lei
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of radio frequency communications, and particularly relates to a method and system for determining the radius of a reflection circle of a filter, and a related device. The method for determining the radius of a reflection circle of a filter provided in the present invention can ensure the accurate calculation of a maximum reflection radius of a reflection circle, and can also ensure the speed of calculation. Compared with existing exhaustive and iterative calculation methods, the method can significantly reduce the time for a single calculation, and has better calculation performance and universality when the number of frequency points is large.

Classes IPC  ?

  • G06F 30/20 - Optimisation, vérification ou simulation de l’objet conçu

18.

BULK ACOUSTIC RESONATOR, AND PREPARATION METHOD THEREFOR

      
Numéro d'application CN2025091650
Numéro de publication 2025/237063
Statut Délivré - en vigueur
Date de dépôt 2025-04-28
Date de publication 2025-11-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Li, Xin
  • Ling, Chenglei
  • Zhong, Lunwei
  • Li, Huan
  • Zhang, Lei
  • Li, Shuai
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of radio frequency communications. Provided are a bulk acoustic resonator, and a preparation method therefor. The preparation method comprises the following steps: step S1, performing mask-aligned ultraviolet exposure on a photosensitive glass substrate; step S2, annealing the photosensitive glass substrate to form a crystallized sacrificial layer; step S3, growing and forming a seed layer on the photosensitive glass substrate; step S4, growing a bottom electrode on the seed layer; step S5, growing and forming a piezoelectric material layer on the upper surface of the bottom electrode and the upper surface of the seed layer; step S6, growing a top electrode on the upper surface of the piezoelectric material layer; step S7, etching the piezoelectric material layer to expose the bottom electrode; step S8, performing etching to form a through hole; and step S9, releasing an etching gas or solution via the through hole to etch the sacrificial layer, so as to form a cavity. The present invention can reduce process steps, lower the process difficulty and costs, decrease the insertion loss of a resonator, and improve the structural stability.

Classes IPC  ?

  • H03H 9/17 - Détails de réalisation de résonateurs se composant de matériau piézo-électrique ou électrostrictif ayant un résonateur unique

19.

FREQUENCY SWEEP STEP DETERMINATION METHOD AND SYSTEM FOR ELASTIC FILTER, AND RELATED DEVICE

      
Numéro d'application CN2025091705
Numéro de publication 2025/237068
Statut Délivré - en vigueur
Date de dépôt 2025-04-28
Date de publication 2025-11-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Chen, Yun
  • Li, Shuai
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of wireless communications, and particularly relates to a frequency sweep step determination method and system for an elastic filter, and a related device. Compared with the prior art, the present invention takes into full consideration the possible problems of frequency offset and fluctuation suppression during a test, and performs refined frequency sweep at the positions of a frequency term and a spurious peak, thereby ensuring the accuracy of test results at the positions of the frequency offset and the fluctuation suppression; the present invention also takes into full consideration the difference, in terms of the step requirements, between a test item having a high requirement for the test precision and a test item having a low requirement for the test precision, and provides different step rules for different test items; with respect to a frequency sweep range within which there are a plurality of test items, the present invention selects from the plurality of test items a step having the highest requirement, thereby ensuring the compatibility in terms of precision; and the present invention only requires the provision of a test specification and performance parameters, and it is not necessary to manually fill out a segmented frequency sweep table, such that the test precision is fully ensured, and the number of frequency points involved in a test can also be reduced to the greatest possible extent.

Classes IPC  ?

  • G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux

20.

RADIO FREQUENCY FRONT-END MODULE HAVING INPUT POWER PROTECTION

      
Numéro d'application CN2025085806
Numéro de publication 2025/223151
Statut Délivré - en vigueur
Date de dépôt 2025-03-28
Date de publication 2025-10-30
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Mao, Binke
  • Shao, Yixiang
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of radio frequency front ends, and particularly to a radio frequency front-end module having input power protection, comprising a signal input end, a bias circuit, an amplifier, and a signal output end that are sequentially electrically connected, wherein the bias circuit comprises a coupling circuit, a rectifier circuit, a switching circuit, and a mirror current source circuit; the coupling circuit is used for isolating a direct-current signal inputted by the signal input end, and allowing a radio frequency signal to pass; the rectifier circuit is used for rectifying the radio frequency signal and outputting an envelope signal; the mirror current source circuit is controlled by the envelope signal and outputs a bias current to the amplifier. The bias circuit in a radio frequency power module of the present invention can measure power inputted to the amplifier, and on the basis of the measured average power of an input signal, actively reduce the bias current inputted to a power amplifier, thereby achieving the purpose of protecting the power amplifier.

Classes IPC  ?

  • H03F 1/52 - Circuits pour la protection de ces amplificateurs
  • H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs
  • H03F 3/19 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs

21.

DIGITAL CIRCUIT FOR MULTI-MIPI-RFFE INTERFACE, AND RADIO FREQUENCY DEVICE

      
Numéro d'application CN2025073169
Numéro de publication 2025/200737
Statut Délivré - en vigueur
Date de dépôt 2025-01-19
Date de publication 2025-10-02
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Sun, Yuan
  • Guo, Jiashuai

Abrégé

The present invention is suitable for the technical field of radio frequency circuits, and particularly relates to a digital circuit for a multi-MIPI-RFFE interface, and a radio frequency device. The digital circuit comprises first and second MIPI protocol parsing modules, a logic parsing module, a control circuit module and a radio frequency circuit module, wherein an input end of the first MIPI protocol parsing module is connected to an external first MIPI host, and an output end of the first MIPI protocol parsing module is connected to a first input end of the logic parsing module; an input end of the second MIPI protocol parsing module is connected to an external second MIPI host, and an output end of the second MIPI protocol parsing module is connected to a second input end of the logic parsing module; an output end of the logic parsing module is connected to an input end of the control circuit module; and an output end of the control circuit module is connected to an input end of the radio frequency circuit module. The present invention prevents the problem of configuration conflicts caused by direct connection of different registers to a control circuit.

Classes IPC  ?

  • H04L 69/18 - Gestionnaires multi-protocoles, p. ex. dispositifs uniques capables de gérer plusieurs protocoles

22.

LOW-NOISE AMPLIFIER AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2025073165
Numéro de publication 2025/167534
Statut Délivré - en vigueur
Date de dépôt 2025-01-19
Date de publication 2025-08-14
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Tong, Lingyun
  • Guo, Jiashuai

Abrégé

The present invention is suitable for the technical field of wireless communications, and particularly relates to a low-noise amplifier and a radio frequency chip. The low-noise amplifier provided by the present invention comprises a signal input end, a first notch filter circuit, an input matching circuit, a power amplification circuit, an output matching circuit, a second notch filter circuit and a signal output end. The first notch filter circuit comprises a first capacitor and a first inductor; a first end of the first inductor serves as a second input end of the first notch filter circuit; a second end of the first inductor is connected to a first end of the first capacitor; and a second end of the first capacitor serves as a first end of the first notch filter circuit. In this way, the present invention achieves out-of-band gain suppression of a low-noise amplifier and performance improvement of an index of an input second-order intercept point, so that the input and output return loss is not increased, thereby improving the performance of the low-noise amplifier.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs

23.

BIAS VOLTAGE ENHANCEMENT CIRCUIT AND RADIO FREQUENCY POWER AMPLIFIER

      
Numéro d'application CN2025073168
Numéro de publication 2025/167535
Statut Délivré - en vigueur
Date de dépôt 2025-01-19
Date de publication 2025-08-14
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Shang, Pengfei
  • Zhou, Yongfeng
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of wireless communications, and in particular relates to a bias voltage enhancement circuit and a radio frequency power amplifier. The bias voltage enhancement circuit comprises a signal input terminal, a current source generation circuit, an overcharge generation circuit, a linear voltage regulator circuit, and a signal output terminal electrically connected in sequence. The overcharge generation circuit comprises a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a first resistor, a second resistor, and a first capacitor. Compared with the prior art, the bias voltage enhancement circuit provided by the present invention generates a controllable voltage overcharge at the moment the bias voltage is established, so that the bias voltage of the radio frequency power amplifier is raised during this bias voltage establishment stage, thereby further improving the linearity of the radio frequency power amplifier during the turn-on phase and effectively enhancing the performance of the radio frequency power amplifier.

Classes IPC  ?

  • G05F 1/56 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des dispositifs à semi-conducteurs en série avec la charge comme dispositifs de réglage final
  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire
  • H03F 3/19 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs
  • H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs
  • H03F 1/14 - Modifications des amplificateurs pour réduire l'influence défavorable de l'impédance interne des éléments amplificateurs par utilisation de moyens de neutrodynage

24.

LOW-NOISE AMPLIFIER AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2025070400
Numéro de publication 2025/161840
Statut Délivré - en vigueur
Date de dépôt 2025-01-03
Date de publication 2025-08-07
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Jia, Junhao
  • Guo, Jiashuai

Abrégé

The present utility model relates to the technical field of wireless communication. Disclosed are a low-noise amplifier and a radio frequency chip. The low-noise amplifier comprises a signal input end, an input matching circuit, an amplification circuit, an output matching circuit and a signal output end which are electrically connected in sequence. The low-noise amplifier further comprises a first transistor; a gate of the first transistor is connected between an output end of the input matching circuit and an input end of the amplification circuit, and the gate of the first transistor is further used for connecting to a first bias voltage; a drain of the first transistor is grounded; a source of the first transistor is connected to an input end of the output matching circuit; and an output end of the amplification circuit is further used for connecting to a power supply voltage. The low-noise amplifier of the present utility model can enhance the linearity of circuits, thereby improving the IIP3 performance of the whole low-noise amplifier.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs
  • H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
  • H03F 3/193 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs comportant des dispositifs à effet de champ
  • H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs

25.

TRANSCONDUCTANCE-ENHANCED LOW-NOISE AMPLIFIER AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2025073167
Numéro de publication 2025/162015
Statut Délivré - en vigueur
Date de dépôt 2025-01-19
Date de publication 2025-08-07
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Tong, Lingyun
  • Guo, Jiashuai

Abrégé

The present invention is suitable for the technical field of wireless communications, and particularly relates to a transconductance-enhanced low-noise amplifier and a radio frequency chip. The transconductance-enhanced low-noise amplifier comprises: an input matching circuit, which comprises a first capacitor and a first inductor, a first end of the first capacitor being connected to a signal input end, a second end thereof being connected to a first end of the first inductor, and a second end of the first inductor being grounded; an output matching circuit, which comprises a second capacitor and a second inductor, a first end of the second capacitor being connected to a signal output end, a second end thereof being connected to a first end of the second inductor, and a second end of the second inductor being connected to a first power supply voltage; an amplifying circuit, which comprises a first MOS transistor and a first resistor, the source electrode of the first MOS transistor being connected to the second end of the first capacitor, the drain electrode thereof being connected to the second end of the second capacitor and the gate electrode thereof being connected to a first end of the first resistor, and a second end of the first resistor being connected to a bias voltage; and a transconductance enhancement circuit, which is used for feeding a signal input into the source electrode of the first MOS transistor into the gate electrode of the first MOS transistor. The present invention improves power gain without addition of a first-stage amplifier.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs

26.

RADIO FREQUENCY FRONT-END MODULE HAVING BIAS COMPENSATION, AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2025070414
Numéro de publication 2025/156970
Statut Délivré - en vigueur
Date de dépôt 2025-01-03
Date de publication 2025-07-31
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Shao, Yixiang
  • Mao, Binke
  • Guo, Jiashuai

Abrégé

The present disclosure is applicable the technical field of radio frequency modules, and particularly relates to a radio frequency front-end module having bias compensation, and a radio frequency chip. The radio frequency front-end module having bias compensation proposed by the present disclosure comprises a signal input end, an input matching circuit, a time-varying circuit, a current mirror circuit, a power amplification circuit, an output matching circuit and a signal output end. A first end of the time-varying circuit is grounded. A second end of the time-varying circuit and a third end of the time-varying circuit are used to connect an enable signal. A fourth end of the time-varying circuit is connected to a first end of the current mirror circuit. A second end of the current mirror circuit is grounded. A third end of the current mirror circuit is used to connect the enable signal. A fifth end of the current mirror circuit is used to output a bias current to an input end of the power amplification circuit. The radio frequency front-end module proposed by the present disclosure can effectively reduce the implementation complexity of transmit power control, thereby reducing radiation and energy consumption, and prolonging the service life of the radio frequency front-end module.

Classes IPC  ?

  • H04B 1/40 - Circuits
  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire

27.

LOW-NOISE AMPLIFIER AND RADIO FREQUENCY POWER AMPLIFIER MODULE

      
Numéro d'application CN2025070374
Numéro de publication 2025/148791
Statut Délivré - en vigueur
Date de dépôt 2025-01-03
Date de publication 2025-07-17
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Yangjun
  • Guo, Jiashuai

Abrégé

The present invention provides a low-noise amplifier and a radio frequency power amplifier module. The low-noise amplifier comprises a signal input end, an input matching circuit, a first resistor, a frequency offset compensation circuit, a first field-effect transistor, a second field-effect transistor, an input attenuation circuit, a third field-effect transistor, a source attenuation circuit, a fourth field-effect transistor, a fifth field-effect transistor, a sixth field-effect transistor, an attenuation branch, a seventh field-effect transistor, a second resistor, a first capacitor, an output matching circuit, an output attenuation circuit, and a signal output end. According to the low-noise amplifier of the present invention, the gain, the noise coefficient, the IIP3 index and the current of the low-noise amplifier can be kept in balance, thereby improving the overall performance of the low-noise amplifier.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs
  • H03F 3/193 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs comportant des dispositifs à effet de champ
  • H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs

28.

LOW-NOISE AMPLIFIER AND RADIO-FREQUENCY CHIP

      
Numéro d'application CN2025070382
Numéro de publication 2025/148793
Statut Délivré - en vigueur
Date de dépôt 2025-01-03
Date de publication 2025-07-17
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Yangjun
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of wireless communications. Disclosed in the present invention are a low-noise amplifier and a radio-frequency chip. The low-noise amplifier comprises a signal input end, a power amplifier circuit, an output matching circuit, an attenuation network and a signal output end, which are sequentially and electrically connected; and the low-noise amplifier further comprises a bypass circuit. The bypass circuit comprises a bypass switch circuit and a bypass matching circuit, wherein a first end of the bypass switch circuit serves as an input end of the bypass circuit, a first output end of the bypass switch circuit serves as a first output end of the bypass circuit, a second output end of the bypass switch circuit is connected to an input end of the bypass matching circuit, and an output end of the bypass matching circuit serves as a second output end of the bypass circuit; and the bypass switch circuit comprises a first bypass switch unit and a second bypass switch unit. The low-noise amplifier of the present invention has a simple structure, occupies a small area, and has high linearity.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs

29.

LOW-NOISE AMPLIFIER AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2025070390
Numéro de publication 2025/148794
Statut Délivré - en vigueur
Date de dépôt 2025-01-03
Date de publication 2025-07-17
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Yangjun
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of wireless communications, and in particular relates to a low-noise amplifier and a radio frequency chip. Compared with the prior art, the low-noise amplifier of the present invention comprises a signal input end, an input matching network, a first gain attenuation unit, a second gain attenuation unit, a power amplification unit, an output matching network, and a signal output end. In the second gain attenuation unit, a gate of a first switch transistor, a gate of a second switch transistor, a gate of a third switch transistor, and a gate of a fourth switch transistor are connected to an external logic control circuit, a source of the first switch transistor, a source of the second switch transistor, a source of the third switch transistor, and a source of the fourth switch transistor are respectively grounded, and a first end of a second inductor is connected to an input end of the power amplification unit. In this way, the low-noise amplifier of the present invention can give considerations to IIP3 and noise figure while the gain is reduced.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs
  • H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
  • H03F 3/193 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs comportant des dispositifs à effet de champ

30.

TUNER CIRCUIT AND RADIO-FREQUENCY CHIP

      
Numéro d'application CN2024126752
Numéro de publication 2025/139276
Statut Délivré - en vigueur
Date de dépôt 2024-10-23
Date de publication 2025-07-03
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Xing, Yangzhong
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of wireless communications. Disclosed in the present invention are a tuner circuit and a radio-frequency chip. The tuner circuit comprises a tuner unit and a tuning device unit, wherein the tuner unit comprises a first resistor, a first transistor, a second resistor and a second transistor; a first end of the first resistor and a first end of the second resistor are connected to each other and jointly serve as an input end of the tuner unit, a second end of the first resistor is connected to a gate electrode of the first transistor, a drain electrode of the first transistor is connected to an input end of the tuning device unit, a source electrode of the first transistor is connected to a drain electrode of the second transistor, a second end of the second resistor is connected to a gate electrode of the second transistor, and a source electrode of the second transistor is grounded; the resistance value of the first resistor is greater than the resistance value of the second resistor; the gate width of the first transistor is greater than the gate width of the second transistor; and the gate length of the first transistor is greater than the gate length of the second transistor. The tuner circuit of the present invention can achieve a higher withstand voltage value and a lower Fom value can be achieved with a smaller area.

Classes IPC  ?

  • H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ

31.

RADIO FREQUENCY FRONT-END MODULE HAVING ADJUSTABLE POWER SUPPLY AND BIAS, AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2024126741
Numéro de publication 2025/123941
Statut Délivré - en vigueur
Date de dépôt 2024-10-23
Date de publication 2025-06-19
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Mao, Binke
  • Shao, Yixiang
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of radio frequency, and disclosed are a radio frequency front-end module having an adjustable power supply and bias, and a radio frequency chip. The radio frequency front-end module comprises a signal input end, an input matching circuit, a final amplifier circuit, and a signal output end which are electrically connected in sequence. The radio frequency front-end module further comprises a power supply voltage conversion circuit and a bias current control circuit. An input end of the bias current control circuit is connected to a power supply, and an output end of the bias current control circuit is connected to a first input end of the final amplifier circuit. An input end of the power supply voltage conversion circuit is used for being connected to a power supply voltage, and an output end of the power supply voltage conversion circuit is connected to a second input end of the final amplifier circuit. A power supply switch and a power supply conversion circuit separately implement operation state switching by means of an external first control signal, and a first MOS transistor implements operation state switching by means of an external second control signal. The radio frequency front-end module of the present invention can adjust the power supply voltage and a bias current, thereby achieving optimization of power consumption and performance.

Classes IPC  ?

  • H04W 52/02 - Dispositions d'économie de puissance

32.

GAIN-ADJUSTABLE LINEAR LOW-NOISE AMPLIFIER

      
Numéro d'application CN2024126720
Numéro de publication 2025/123940
Statut Délivré - en vigueur
Date de dépôt 2024-10-23
Date de publication 2025-06-19
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhang, Shen
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of radio frequency. Disclosed in the present invention is a gain-adjustable linear low-noise amplifier, comprising a signal input end, an input matching adjustment module, a power amplification module, an output feedback module, an output matching adjustment module, a bias circuit module and a signal output end, wherein the signal input end, the input matching adjustment module, the power amplification module, the output matching adjustment module and the signal output end are electrically connected in sequence; two ends of the output feedback module are respectively connected to an output end of the power amplification module and an input end of the power amplification module, and the bias circuit module is connected to the input end of the power amplification module to provide a bias current; the bias circuit module comprises a first MOS transistor, a second MOS transistor, a third MOS transistor, a first resistor, a second resistor and a constant current source; and the output feedback module comprises a feedback circuit and a third resistor. The linear low-noise amplifier in the present invention can realize an adjustable gain, and has a good power consumption and a high level of linearity.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs

33.

LEVEL CONVERTER

      
Numéro d'application CN2024127276
Numéro de publication 2025/113015
Statut Délivré - en vigueur
Date de dépôt 2024-10-25
Date de publication 2025-06-05
Propriétaire
  • LANSUS TECHNOLOGIES INC. (Chine)
  • LANSUS TECHNOLOGIES (SHANGHAI) CO., LTD. (Chine)
Inventeur(s)
  • Li, Penghao
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of electronics, and provides a level converter. Compared with the prior art, the level converter provided by the present invention comprises a low-voltage inverter chain, a conversion capacitor unit, a conversion protection diode unit and a conversion cross-coupling pair. The conversion capacitor unit comprises a first capacitor and a second capacitor. A first end of the first capacitor receives a second differential logic signal, and a first end of the second capacitor receives a first differential logic signal. A second end of the first capacitor and a second end of the second capacitor are respectively connected to input ends of the conversion protection diode unit. Input ends of the conversion capacitor unit comprises a first capacitor input end and a second capacitor input end. The first end of the first capacitor serves as the first capacitor input end, and the first end of the second capacitor serves as the second capacitor input end. According to the level converter of the present invention, the overall structure is simpler, power consumption is effectively reduced, and a conversion dead zone is avoided.

Classes IPC  ?

  • H03K 19/0185 - Dispositions pour le couplageDispositions pour l'interface utilisant uniquement des transistors à effet de champ

34.

PARAMETER OPTIMIZATION METHOD AND SYSTEM FOR ULTRA-WIDEBAND ANTENNA OF GRADUALLY CHANGING STRUCTURE, AND RELATED DEVICE

      
Numéro d'application CN2024127353
Numéro de publication 2025/113016
Statut Délivré - en vigueur
Date de dépôt 2024-10-25
Date de publication 2025-06-05
Propriétaire
  • LANSUS TECHNOLOGIES INC. (Chine)
  • LANSUS TECHNOLOGIES (SHANGHAI) CO., LTD. (Chine)
Inventeur(s)
  • Yu, Weisheng
  • Guo, Jiashuai
  • Hu, Bin
  • Yang, Jia
  • Huang, Kaifeng
  • Chen, Linfeng

Abrégé

The present invention is suitable for the field of ultra-wideband antenna optimization, and particularly relates to a parameter optimization method and system for an ultra-wideband antenna of a gradually changing structure, and a related device. The method comprises: using a structural parameter of an ultra-wideband antenna of a gradually changing structure as a single individual of a genetic algorithm, and initializing a population that contains a plurality of individuals and is used by the genetic algorithm, so as to obtain an initial population; using a preset simulation tool to perform simulation calculation on the structural parameter corresponding to each individual in the initial population, so as to obtain an S parameter corresponding to the structural parameter; calculating the fitness of the initial population on the basis of the S parameters; using the initial population and the fitness as parameters of the genetic algorithm to perform iterative optimization calculation until the fitness meets a preset optimization condition; and outputting, as an optimization result, the structural parameter corresponding to the fitness. The present invention can improve the optimization efficiency of structural parameters of an antenna.

Classes IPC  ?

  • G06F 30/27 - Optimisation, vérification ou simulation de l’objet conçu utilisant l’apprentissage automatique, p. ex. l’intelligence artificielle, les réseaux neuronaux, les machines à support de vecteur [MSV] ou l’apprentissage d’un modèle

35.

RADIO-FREQUENCY POWER AMPLIFIER AND RADIO-FREQUENCY CHIP MODULE

      
Numéro d'application CN2024126621
Numéro de publication 2025/107975
Statut Délivré - en vigueur
Date de dépôt 2024-10-23
Date de publication 2025-05-30
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Xie, Zhiyuan
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of radio frequency. Disclosed in the present invention are a radio-frequency power amplifier and a radio-frequency chip module. The radio-frequency power amplifier comprises a signal input end, an input matching circuit, a power amplifier, a bias circuit, and a signal output end, wherein the signal input end, the input matching circuit, the power amplifier and the signal output end are electrically connected in sequence; an input end of the bias circuit is connected to a reference voltage source, and an output end of the bias circuit is connected between the input matching circuit and the power amplifier; the bias circuit comprises a first resistor, a first triode, a second triode, a second resistor, a third triode, a third resistor, a first capacitor and a second capacitor; and a collector of the third triode is connected to a first end of the second capacitor, and an emitter of the third triode is connected to a second end of the second capacitor. The radio-frequency power amplifier in the present invention can increase output power, and can also effectively reduce power consumption and improve the efficiency.

Classes IPC  ?

  • H03F 3/19 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs

36.

METHOD AND SYSTEM FOR DESIGNING FILTER PARAMETERS ON BASIS OF BAYESIAN OPTIMIZATION, AND RELATED DEVICE

      
Numéro d'application CN2024126608
Numéro de publication 2025/103096
Statut Délivré - en vigueur
Date de dépôt 2024-10-23
Date de publication 2025-05-22
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Chen, Rouxiao
  • Chang, Linsen
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of filter optimization design, and in particular relates to a method and system for designing filter parameters on the basis of Bayesian optimization, and a related device. The method comprises the following steps: constructing an optimization model on the basis of parameters of a surface acoustic wave filter that need to be optimized, and performing optimization calculation on the parameters on the basis of the optimization model, so as to obtain optimized parameters; constructing a preset optimization algorithm based on a Bayesian optimization method; and performing iterative calculation by taking the optimized parameters as inputs of the preset optimization algorithm, and obtaining a parameter optimization result corresponding to the parameters. Compared with the prior art, the present invention uses an HCT-FEM method to replace a COM to calculate the parameters of a filter, which improves the calculation precision of filter parameters when the number of IDTs is small; moreover, a Bayesian optimization method is used during parameter optimization, which avoids the problems of gradient optimization relying on initial values and the optimization efficiency of global optimization being low, and improves the iteration speed of the parameter optimization process.

Classes IPC  ?

  • G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]

37.

POWER AMPLIFIER CIRCUIT AND RADIO FREQUENCY POWER AMPLIFIER MODULE

      
Numéro d'application CN2024114451
Numéro de publication 2025/060824
Statut Délivré - en vigueur
Date de dépôt 2024-08-26
Date de publication 2025-03-27
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Shao, Yixiang
  • Mao, Binke
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of radio frequency. Disclosed are a power amplifier circuit and a radio frequency power amplifier module. The power amplifier circuit comprises a signal input end, a first-stage power amplifier, a coupler, an inter-stage matching circuit, a final-stage power amplifier, an output matching circuit, and a signal output end. The final-stage power amplifier comprises a first field-effect transistor. The power amplifier circuit further comprises a power detection module, a capacitor assembly consisting of multiple capacitors connected in parallel, a first triode, a first resistor, a triode assembly consisting of one or more triodes connected in series, a second resistor, a first capacitor, a third resistor, a first inductor, a second capacitor, and a varicap diode. According to the power amplifier circuit of the present invention, the amplitude modulation and phase modulation performance of amplifiers can be optimized, the technical implementation is simple, and the cost is low.

Classes IPC  ?

  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire

38.

DUAL-MODE RADIO FREQUENCY FRONT-END MODULE

      
Numéro d'application CN2024114461
Numéro de publication 2025/060825
Statut Délivré - en vigueur
Date de dépôt 2024-08-26
Date de publication 2025-03-27
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Mao, Binke
  • Shao, Yixiang
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of radio frequency modules. Disclosed is a dual-mode radio frequency front-end module. The dual-mode radio frequency front-end module comprises a signal input end, a first-stage amplifier, an interstage matching circuit, a second-stage amplifier, a main bias circuit and a signal output end, wherein the main bias circuit comprises an amplifier bias circuit and a current adjustment circuit, a first end of the current adjustment circuit is used for being connected to an input port of a radio frequency front end, a second end of the current adjustment circuit is grounded, a third end of the current adjustment circuit is connected to both a power source voltage and a first end of the amplifier bias circuit, and a fourth end of the current adjustment circuit is connected to a second end of the amplifier bias circuit; and a third end of the amplifier bias circuit is grounded, a fourth end of the amplifier bias circuit is connected to the power source voltage, a fifth end of the amplifier bias circuit serves as an output end of the main bias circuit, and the fifth end of the amplifier bias circuit outputs a bias current to a gate electrode of the second-stage amplifier. The dual-mode radio frequency front-end module of the present invention can prevent signal distortion, reduces energy consumption, and has high working efficiency.

Classes IPC  ?

  • H04B 1/401 - Circuits pour le choix ou l’indication du mode de fonctionnement
  • H04B 1/44 - Commutation transmission-réception

39.

BG START-UP CIRCUIT AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2024107169
Numéro de publication 2025/031143
Statut Délivré - en vigueur
Date de dépôt 2024-07-24
Date de publication 2025-02-13
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Li, Penghao
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of electronics. Disclosed in the present invention are a BG start-up circuit and a radio frequency chip. The BG start-up circuit comprises a signal input end, a start-up circuit, a BG main-body circuit and a signal output end, wherein the start-up circuit comprises an inverter link, a bias branch, a capacitor charging branch, a start-up detection branch and a current injection branch, which are electrically connected in sequence; the signal input end is used for realizing the connection of an enable signal with the whole circuit; an input end of the inverter link respectively outputs a first reverse signal and a second reverse signal; an output end of the bias branch outputs a bias voltage; the capacitor charging branch outputs a charging signal; the start-up detection branch outputs a voltage measurement signal; an input end of the current injection branch converts the voltage measurement signal into a current signal; and the BG main-body circuit respectively receives the current signal and the second reverse signal to start up the circuit. The BG start-up circuit in the present invention has a simple structure, low power consumption and good reliability.

Classes IPC  ?

  • H03K 19/20 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion caractérisés par la fonction logique, p. ex. circuits ET, OU, NI, NON

40.

TRANSMISSION POWER ADJUSTMENT MODULE, RADIO-FREQUENCY FRONT-END MODULE, AND WIRELESS TRANSMISSION DEVICE

      
Numéro d'application CN2024107163
Numéro de publication 2025/026155
Statut Délivré - en vigueur
Date de dépôt 2024-07-24
Date de publication 2025-02-06
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Wang, Sijin
  • Mao, Binke
  • Shao, Yixiang
  • Guo, Jiashuai

Abrégé

The present invention belongs to the technical field of radio frequency. Disclosed are a transmission power adjustment module, a radio-frequency front-end module, and a wireless transmission device. The transmission power adjustment module comprises a signal receiving end, a low-noise amplifier, a signal coupler, a signal output end, a coupling-signal amplifier, a rectifier module, a first transistor, a second transistor, a first switch, a capacitor, a second switch, a third transistor, a fourth transistor and an adjustable resistor module. The transmission power adjustment module in the present invention can not only adjust the transmission power of a power amplifier in a radio-frequency front-end module, such that the power amplifier does not perform transmission at the maximum power all the time, thereby reducing radiation, reducing power consumption and heat generation, and prolonging the service life, but can also make the implementation process simpler.

Classes IPC  ?

41.

CLOCK SIGNAL CONTROL MODULE AND RADIO FREQUENCY FRONT END MODULE

      
Numéro d'application CN2024094470
Numéro de publication 2025/020658
Statut Délivré - en vigueur
Date de dépôt 2024-05-21
Date de publication 2025-01-30
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Ren, Xiaojiao
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of radio frequency, and disclosed are a clock signal control module and a radio frequency front end module. The clock signal control module comprises an RC oscillating circuit, a random sequence generating circuit, and a control circuit; the RC oscillating circuit comprises capacitors and resistors; an input end of the random sequence generating circuit is connected to an input end of the RC oscillating circuit, and an input end of the control circuit is connected to an output end of the random sequence generating circuit; the random sequence generating circuit is used for generating a random control signal, and the control circuit is used for controlling, on the basis of the received control signal, the capacitance and/or the resistance of the capacitors and/or the resistors connected to the oscillating frequency of the RC oscillating circuit. In the clock signal control module in the present invention, harmonic noise of the clock signal control module at a high frequency band can be averaged, with no periodic spikes, essentially solving the problem of clock harmonic noise.

Classes IPC  ?

  • H03K 3/013 - Modifications du générateur en vue d'éviter l'action du bruit ou des interférences

42.

SURFACE ACOUSTIC WAVE FILTER PARAMETER OPTIMIZATION METHOD AND SYSTEM, AND RELATED DEVICE

      
Numéro d'application CN2024094418
Numéro de publication 2025/011198
Statut Délivré - en vigueur
Date de dépôt 2024-05-21
Date de publication 2025-01-16
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Chang, Linsen
  • Zhang, Lei
  • Yuan, Junping
  • Zhong, Yan
  • Chen, Rouxiao
  • Zhou, Wenhan
  • Li, Shuai
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of numerical optimization, and particularly relates to a surface acoustic wave filter parameter optimization method and system, and a related device. The method comprises: S1, constructing an optimization model on the basis of a parameter needing to be optimized of a surface acoustic wave filter, and performing optimization computation on the parameter on the basis of the optimization model to obtain an optimized parameter; S2, constructing an adaptive particle swarm optimization algorithm capable of parallel computation of particle fitness, wherein the particle fitness comprises velocity and position; and S3, performing iterative computation by taking a particle swarm comprising the optimized parameter as input of the adaptive particle swarm optimization algorithm, to obtain a parameter optimization result corresponding to the parameter. The present invention solves the problems of difficulty in optimization and low optimization efficiency in a parameter optimization process by means of parameter coupling and swarm parallelism methods, improves the computation efficiency in filter parameter optimization, and further optimizes the simulation process.

Classes IPC  ?

  • G06F 30/25 - Optimisation, vérification ou simulation de l’objet conçu utilisant des méthodes basées sur les particules
  • G06F 30/20 - Optimisation, vérification ou simulation de l’objet conçu
  • G06N 3/006 - Vie artificielle, c.-à-d. agencements informatiques simulant la vie fondés sur des formes de vie individuelles ou collectives simulées et virtuelles, p. ex. simulations sociales ou optimisation par essaims particulaires [PSO]
  • H02J 3/38 - Dispositions pour l’alimentation en parallèle d’un seul réseau, par plusieurs générateurs, convertisseurs ou transformateurs

43.

DESIGN METHOD AND SYSTEM FOR FREQUENCY BAND OF SURFACE ACOUSTIC WAVE FILTER AND RELATED DEVICE

      
Numéro d'application CN2024094437
Numéro de publication 2025/011200
Statut Délivré - en vigueur
Date de dépôt 2024-05-21
Date de publication 2025-01-16
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Chang, Linsen
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of filter optimization. Disclosed in the present invention are a design method and system for a frequency band of a surface acoustic wave filter and a related device. The design method comprises the following steps: step S1, establishing a performance parameter database of existing surface acoustic wave filters of frequency bands; step S2, extracting, from the performance parameter database, dms geometric parameters corresponding to the existing surface acoustic wave filter of a similar frequency band similar to a designed frequency band, and adjusting the pitch of the dms geometric parameters to transplant the similar frequency band to the corresponding designed frequency band, to obtain a frequency band initial value; step S3, removing unimportant variables of the dms geometric parameters by means of a Sobal sensitivity analysis method, and reserving corresponding important variables of the dms geometric parameters; and step S4, on the basis of the frequency band initial value and the important variables, performing optimization calculation by means of a gradient optimization algorithm to obtain a performance parameter of a target surface acoustic wave filter. The design method for the frequency band of the surface acoustic wave filter provided by the present invention can improve the design efficiency of the frequency band.

Classes IPC  ?

  • G06F 30/373 - Optimisation de la conception
  • G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
  • H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiquesRésonateurs électromécaniques Détails

44.

REAL-TIME SIMULATION METHOD AND SYSTEM FOR ELECTROTHERMAL PROPERTIES OF ELASTIC WAVE FILTER, AND RELATED DEVICE

      
Numéro d'application CN2024094381
Numéro de publication 2025/001635
Statut Délivré - en vigueur
Date de dépôt 2024-05-21
Date de publication 2025-01-02
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhou, Wenhan
  • Zhu, Yuquan
  • Guan, Peng
  • Guo, Jiashuai

Abrégé

The present invention provides a real-time simulation method and system for electrothermal properties of an elastic wave filter, and a related device. The method comprises the following steps: establishing a finite element simulation heat transfer three-dimensional model of the elastic wave filter; setting a heating boundary condition of each resonator, and carrying out thermal simulation on each resonator; calculating an environment heat transfer tensor of the elastic wave filter; establishing an equivalent circuit model of the elastic wave filter, and then carrying out electrical simulation on the equivalent circuit model to obtain the heating power of the elastic wave filter; and coupling the environment heat transfer tensor with the heating power to finally obtain the real-time electrothermal properties of the elastic wave filter. The present invention has the beneficial effects that the environment heat transfer tensor of the elastic wave filter obtained by means of temperature simulation is coupled with the heating power, so that the temperature of each resonator on the elastic wave filter can be obtained by means of real-time simulation while using an equivalent circuit to design the elastic wave filter, thereby simplifying the steps of the temperature simulation, and greatly shortening the design period of the elastic wave filter.

Classes IPC  ?

  • G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]
  • G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation
  • G06F 30/10 - CAO géométrique
  • G06T 17/20 - Description filaire, p. ex. polygonalisation ou tessellation

45.

BIAS CIRCUIT, RADIO FREQUENCY CIRCUIT, AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2024094388
Numéro de publication 2025/001636
Statut Délivré - en vigueur
Date de dépôt 2024-05-21
Date de publication 2025-01-02
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Mao, Binke
  • Shao, Yixiang
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of wireless communications. Disclosed are a bias circuit, a radio frequency circuit, and a radio frequency chip. The bias circuit comprises a signal input end, an overshoot circuit, a current mirror circuit, a voltage reverse circuit, a bias voltage output circuit, and a signal output end. The signal input end is connected to the current mirror circuit, the voltage reverse circuit and the bias voltage output circuit, respectively. A first end of the overshoot circuit is grounded, and a second end of the overshoot circuit is connected to the current mirror circuit. The signal input end is used for receiving an enable signal. The overshoot circuit is used for generating overshoot to compensate for the response speed of a radio frequency amplifier. The output end of the current mirror circuit is connected to a second input end of the voltage reverse circuit. The output end of the voltage reverse circuit is connected to a second input end of the bias voltage output circuit. A third input end of the bias voltage output circuit is used for being connected to a power supply, and the output end of the bias voltage output circuit is connected to the signal output end. The bias circuit of the present invention enables the transient response effect of the radio frequency amplifier to be fast.

Classes IPC  ?

  • H03F 1/30 - Modifications des amplificateurs pour réduire l'influence des variations de la température ou de la tension d'alimentation

46.

RADIO FREQUENCY DIE MODULE DEBUGGING DEVICE AND METHOD

      
Numéro d'application CN2024094367
Numéro de publication 2024/260197
Statut Délivré - en vigueur
Date de dépôt 2024-05-21
Date de publication 2024-12-26
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Mao, Binke
  • Shao, Yixiang
  • Zhou, Jiahui
  • Guo, Jiashuai

Abrégé

The present invention relates to the technical field of communications. Disclosed in the present invention are a radio frequency die module debugging device and method. The radio frequency die module debugging device comprises a debugging connection module, a direct current power supply, a radio frequency signal source, a radio frequency signal analyzer, a debugging board and a superordinate computer. The debugging connection module comprises a substrate and debugged power amplifier dies (PADs) arranged on the substrate; the debugged PADs are electrically connected to one ends of debugging bias signals; one ends of a plurality of analog switches are respectively connected to the superordinate computer and the direct current power supply; second ends of the plurality of analog switches are respectively connected to the other ends of the debugged PADs; one end of a current detection unit is connected to the direct current power supply, and the other end of the current detection unit is connected to the analog switches; the current detection unit is used for detecting an output current signal; and the radio frequency signal analyzer is used for detecting an output radio frequency signal and feeding back the current signal and the radio frequency signal to the superordinate computer. The radio frequency die module debugging device of the present invention involves low research and development costs and has high test efficiency.

Classes IPC  ?

47.

PREPARATION METHOD FOR REDUCING STANDING WAVE EFFECT DURING EXPOSURE OF WAFER

      
Numéro d'application CN2024094116
Numéro de publication 2024/255534
Statut Délivré - en vigueur
Date de dépôt 2024-05-20
Date de publication 2024-12-19
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Li, Shuai
  • Zhang, Lei
  • Zhou, Wenhan
  • Zhong, Lunwei
  • Guo, Jiashuai

Abrégé

A preparation method for reducing a standing wave effect during exposure of a wafer. The method comprises the following steps: S1, coating a back surface of a wafer with an antireflection film, wherein the wafer is a wafer made of a piezoelectric material, and the antireflection film is a semiconductor thin film; S2, spin-coating, with a photoresist, the surface of the wafer that has been coated with the antireflection film, and performing exposure and development processing, so as to form a photolithographic pattern; S3, stripping the photoresist off the wafer on which the photolithographic pattern has been formed; and S4, removing the antireflection film from the wafer off which the photoresist has been stripped. By means of the preparation method, a standing wave effect caused by interference between reflected light from a front surface of a wafer and reflected light from a back surface of the wafer can be reduced, such that an interdigitated appearance is improved to form a perfect sidewall structure, and the flexibility of design of a wafer can also be improved.

Classes IPC  ?

  • G03F 7/09 - Matériaux photosensibles caractérisés par des détails de structure, p. ex. supports, couches auxiliaires
  • H01L 21/027 - Fabrication de masques sur des corps semi-conducteurs pour traitement photolithographique ultérieur, non prévue dans le groupe ou
  • H03H 3/08 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface

48.

RADIO FREQUENCY LOW-NOISE AMPLIFIER CIRCUIT AND RADIO FREQUENCY CHIP

      
Numéro d'application 18806717
Statut En instance
Date de dépôt 2024-08-16
Date de la première publication 2024-12-12
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Shang, Pengfei
  • Guo, Jiashuai

Abrégé

A radio frequency low-noise amplifier circuit and a radio frequency chip includes a signal input end, an input matching circuit, an amplification circuit, an output matching circuit, a signal output end, and a gain adjustment circuit connected in parallel with the amplification circuit. The gain adjustment circuit includes a tenth transistor, an eleventh transistor, a twelfth transistor, a first resistor, a second resistor, a third resistor, and a fourth capacitor. A source of the tenth transistor, a source of the eleventh transistor, and a source of the twelfth transistor are connected and are grounded. The tenth transistor is connected to the first resistor, the eleventh transistor is connected to the second resistor, and the twelfth transistor is connected to the third resistor. The first resistor, the second resistor, and the third resistor are connected to the fourth capacitor. The fourth capacitor is connected to the amplification circuit.

Classes IPC  ?

  • H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs
  • H03F 3/195 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
  • H04B 1/04 - Circuits

49.

Adaptive frequency sweeping method and adaptive frequency sweeping system for frequency point sampling, and related device

      
Numéro d'application 18813047
Numéro de brevet 12266866
Statut Délivré - en vigueur
Date de dépôt 2024-08-23
Date de la première publication 2024-12-12
Date d'octroi 2025-04-01
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Guan, Peng
  • Zhou, Wenhan
  • Yang, Ruizhi
  • Hu, Jinzhao
  • Guo, Jiashuai

Abrégé

An adaptive frequency sweeping method and an adaptive frequency sweeping system for frequency point sampling, and related devices, related to a technical field of wireless communication are provided, the adaptive frequency sweeping method is applied to simulation of radio frequency (RF) components. The adaptive frequency sweeping method for the frequency point sampling does not hinge upon specific numerical values and enables precise simulation at positions where frequency responses rapidly change while performing coarse simulation in areas that are not concerned about, thereby improving precision and efficiency of a design process for the RF components. Moreover, aiming at characteristics of Y parameters and S parameters in the frequency responses, different evaluation metrics are provided to reduce sampling points required for frequency sweeping and increasing a frequency sweeping speed.

Classes IPC  ?

  • H01Q 3/22 - Dispositifs pour changer ou faire varier l'orientation ou la forme du diagramme de directivité des ondes rayonnées par une antenne ou un système d'antenne faisant varier l'orientation suivant la variation de fréquence de l'onde rayonnée

50.

SIMULATION PARAMETER ACQUISITION METHOD AND SYSTEM FOR ELASTIC WAVE DEVICE, AND RELATED DEVICE

      
Numéro d'application CN2024094115
Numéro de publication 2024/250945
Statut Délivré - en vigueur
Date de dépôt 2024-05-20
Date de publication 2024-12-12
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Yuan, Junping
  • Zhou, Wenhan
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of wireless communications, and particularly relates to a simulation parameter acquisition method and system for an elastic wave device, and a related device. Provided in the present invention is a simulation parameter acquisition method for an elastic wave device, which method can fully utilize tape-out data of a large number of filters; according to the method of the present invention, in the acquisition of simulation parameters of an elastic wave device, the objective of simulation is not to take actual parameters as a benchmark, but rather to reduce admittance and scattering curve errors, thus improving the utilization rate of simulation data whilst enabling an elastic wave device constructed on the basis of the obtained simulation parameters to be closer to the actual performance, and also improving the simulation precision and model quality of a simulation method using a coupling model for the acquisition of simulation parameters of an elastic wave device, such that the model is highly transferable.

Classes IPC  ?

  • G06F 30/27 - Optimisation, vérification ou simulation de l’objet conçu utilisant l’apprentissage automatique, p. ex. l’intelligence artificielle, les réseaux neuronaux, les machines à support de vecteur [MSV] ou l’apprentissage d’un modèle
  • G06F 119/02 - Analyse de fiabilité ou optimisation de fiabilitéAnalyse de défaillance, p. ex. performance dans le pire scénario, analyse du mode de défaillance et de ses effets [FMEA]

51.

FINITE ELEMENT SIMULATION METHOD AND SYSTEM USING MIXED UNIT ORDER, AND RELATED DEVICE

      
Numéro d'application CN2024090879
Numéro de publication 2024/244887
Statut Délivré - en vigueur
Date de dépôt 2024-04-30
Date de publication 2024-12-05
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Guan, Peng
  • Zhou, Wenhan
  • Guo, Jiashuai

Abrégé

The present invention is suitable for the technical field of wireless communications, and particularly relates to a finite element simulation method and system using a mixed unit order, and a related device. The present invention provides a method for performing modeling by using a grid type, in which a high-order unit and a low-order unit are combined, in filtering device simulation based on a finite element method. Units with different orders are assembled in a model, and the interpolation characteristic of the low-order unit is used to constrain a conflict node in the high-order unit and eliminate the degree of freedom thereof, such that the overall degree of freedom of a filtering device model, which is constructed by means of simulation, is reduced on the premise of ensuring the computation precision, thereby reducing the computation dimensionality and improving the overall computation efficiency of a simulation process.

Classes IPC  ?

  • G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]

52.

COMBINED SIMULATION METHOD AND SYSTEM FOR MULTIPLE SURFACE ACOUSTIC WAVE DEVICES, AND RELATED APPARATUS

      
Numéro d'application CN2024090895
Numéro de publication 2024/244889
Statut Délivré - en vigueur
Date de dépôt 2024-04-30
Date de publication 2024-12-05
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhong, Yan
  • Yuan, Junping
  • Zhou, Wenhan
  • Zhu, Yuquan
  • Guan, Peng
  • Chen, Rouxiao
  • Chang, Linsen
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of piezoelectric simulation, and particularly relates to a combined simulation method and system for multiple surface acoustic wave devices, and a related apparatus. The present invention provides a combined simulation method for multiple surface acoustic wave devices, in which ports of each circuit element in a filter device are exposed during modeling. According to the method, a P matrix model based on ports of circuit elements is established, and combined connection and simulation circuit simulation between devices are performed by using the matrix model, such that simulation modeling of structures containing short circuits, suspension and the like is realized; and rapid simulation of a combination of multiple surface acoustic wave devices is realized on the basis of a combined circuit, thereby improving simulation efficiency.

Classes IPC  ?

  • G06F 30/27 - Optimisation, vérification ou simulation de l’objet conçu utilisant l’apprentissage automatique, p. ex. l’intelligence artificielle, les réseaux neuronaux, les machines à support de vecteur [MSV] ou l’apprentissage d’un modèle

53.

AUTOMATIC ASSEMBLY METHOD AND SYSTEM FOR SURFACE ACOUSTIC WAVE FILTER LAYOUTS, AND RELATED DEVICE

      
Numéro d'application CN2024094167
Numéro de publication 2024/245023
Statut Délivré - en vigueur
Date de dépôt 2024-05-20
Date de publication 2024-12-05
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Yuan, Junping
  • Zhong, Yan
  • Chang, Linsen
  • Chen, Rouxiao
  • Zhou, Wenhan
  • Guan, Peng
  • Zhu, Yuquan
  • Guo, Jiashuai

Abrégé

The present invention is suitable for the technical field of wireless communications, and particularly relates to an automatic assembly method and system for surface acoustic wave filter layouts, and a related device. The present invention provides a method for sequentially generating interdigital transducer layouts and reflection grating layouts from the most basic interdigital and busbar units and finally assembling same into complete surface acoustic wave filter layouts. According to the method, automatic layout assembly can be carried out according to a preset rule, and basic geometric parameters of a library of units can be selected according to surface acoustic wave filters to be assembled. Compared with an artificial layout design process in the prior art, the method of the present invention can reduce the time cost when the surface acoustic wave filter with a gradient structure is drawn, avoid the manual error probability, and improve the working efficiency.

Classes IPC  ?

  • H03H 3/02 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux piézo-électriques ou électrostrictifs
  • H03H 9/64 - Filtres utilisant des ondes acoustiques de surface
  • H03H 9/145 - Moyens d'excitation, p. ex. électrodes, bobines pour réseaux utilisant des ondes acoustiques de surface

54.

Temperature compensation bias circuit and power amplifier

      
Numéro d'application 18806715
Numéro de brevet 12255591
Statut Délivré - en vigueur
Date de dépôt 2024-08-16
Date de la première publication 2024-12-05
Date d'octroi 2025-03-18
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Wei
  • Guo, Jiashuai

Abrégé

A temperature compensation bias circuit is provided, including a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a second capacitor, a third capacitor, a fifth capacitor, a fifth transistor, a sixth transistor, and a seventh transistor. A power amplifier is further provided, the power amplifier applies the temperate compensation bias circuit. Compared with the prior art, there are fewer effects on a bias point of the temperature compensation bias circuit when the temperature compensation bias circuit and the power amplifier are in RF operating states, the power amplifier is enabled to have good temperature compensation effect and high linearity.

Classes IPC  ?

  • H03F 3/24 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie

55.

GRID MATRIX GENERATION METHOD AND SYSTEM FOR FINITE ELEMENT SIMULATION, AND RELATED DEVICE

      
Numéro d'application CN2024090841
Numéro de publication 2024/244885
Statut Délivré - en vigueur
Date de dépôt 2024-04-30
Date de publication 2024-12-05
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Guan, Peng
  • Zhu, Yuquan
  • Zhou, Wenhan
  • Yuan, Junping
  • Zhong, Yan
  • Chen, Rouxiao
  • Chang, Linsen
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of piezoelectric material electromechanical coupling, and particularly relates to a grid matrix generation method and system for finite element simulation, and a related device. The present invention provides a method for using mathematical relationships among finite element grids of different sizes in the simulation process of a surface acoustic wave device to quickly calculate and obtain element matrixes. Compared with the prior art, the method of the present invention can calculate finite element matrixes for interdigital transducer portions made of different materials, and reduce the calculation amount of the matrixes according to the types of the materials; and in the simulation of the surface acoustic wave device having unobvious periodic characteristics, complex layers and variable structures, the calculation efficiency of simulation can be remarkably improved.

Classes IPC  ?

  • G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]

56.

SIMULATION METHOD AND SYSTEM BASED ON SEPARATED DEGREES OF FREEDOM IN MULTIPHYSICS, AND RELATED DEVICE

      
Numéro d'application CN2024090871
Numéro de publication 2024/244886
Statut Délivré - en vigueur
Date de dépôt 2024-04-30
Date de publication 2024-12-05
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Guan, Peng
  • Guo, Jiashuai

Abrégé

The present invention is suitable for the technical field of wireless communications, and particularly relates to a simulation method and system based on separated degrees of freedom in multiphysics, and a related device. Provided in the present invention is a simulation method based on separated degrees of freedom in multiphysics. In the method, for a matrix of an internal degree of freedom among matrices of a filtering device, which is constructed by using a finite element method, the characteristic of only matrices of some physical fields changing along with frequency in multiphysics simulation is used to construct an invariable cache matrix according to an inversion rule of a block matrix, so as to reduce the dimensionality of a matrix to be subjected to inversion, thereby reducing the inversion calculation amount of matrix splicing in a hierarchical cascading technique, and improving the overall simulation efficiency.

Classes IPC  ?

  • G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]

57.

ADAPTIVE ADJUSTMENT IMPEDANCE CIRCUIT

      
Numéro d'application CN2024090903
Numéro de publication 2024/239938
Statut Délivré - en vigueur
Date de dépôt 2024-04-30
Date de publication 2024-11-28
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Mao, Binke
  • Shao, Yixiang
  • Guo, Jiashuai

Abrégé

Disclosed in the present invention is an adaptive adjustment impedance circuit, comprising a power amplifier, a directional coupler and a control logic circuit which are connected in sequence. The adaptive adjustment impedance circuit further comprises an impedance tuning circuit, a first power detector and a second power detector. An output end of the power amplifier is connected to an input end of the impedance tuning circuit, an output end of the impedance tuning circuit is connected to an input end of the directional coupler, and an output end of the directional coupler is connected to a load. An input end of the first power detector is connected to the output end of the power amplifier, and an input end of the second power detector is connected to the output end of the directional coupler. An output end of the first power detector and an output end of the second power detector are separately connected to an input end of the control logic circuit, and an output end of the control logic circuit is connected to the input end of the impedance tuning circuit. The self-adaptive impedance adjustment circuit of the present invention exhibits strong anti-interference capability, high transmission efficiency and wide application range.

Classes IPC  ?

  • H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
  • H03H 11/30 - Adaptation automatique de l'impédance de source à l'impédance de charge
  • H04B 1/04 - Circuits

58.

METHOD AND SYSTEM FOR PREDICTING ENERGY WITHSTAND VALUE OF FILTERING DEVICE, AND RELATED DEVICE

      
Numéro d'application CN2024090860
Numéro de publication 2024/230595
Statut Délivré - en vigueur
Date de dépôt 2024-04-30
Date de publication 2024-11-14
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhou, Wenhan
  • Luo, Weixia
  • Xu, Keda
  • Xie, Xiaohuan
  • Chen, Yun
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the field of thermal simulation, and particularly relates to a method and system for predicting an energy withstand value of a filtering device, and a related device. Provided in the present invention is a method for predicting an energy withstand value of a filtering device by means of coupling electrical simulation, thermal simulation and an actual test. A power prediction factor is calculated by means of coupling a plurality of types of simulation data, such that influence of a packaging environment on circuit elements when same generate heat, and influence of thermal crosstalk between electronic elements can be embodied when a withstand value is calculated; and compared with existing techniques, the present invention can make data better fit actual thermal simulation results.

Classes IPC  ?

  • G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation

59.

POWER AMPLIFIER CIRCUIT AND RADIO FREQUENCY POWER AMPLIFIER MODULE

      
Numéro d'application CN2024084262
Numéro de publication 2024/222365
Statut Délivré - en vigueur
Date de dépôt 2024-03-28
Date de publication 2024-10-31
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Feng, Linhua
  • Guo, Jiashuai

Abrégé

Disclosed in the present invention are a power amplifier circuit and a radio frequency power amplifier module. The power amplifier circuit comprises a signal input end, an input matching network, a first power amplifier, a first bias circuit, a second power amplifier, a second bias circuit, an interstage matching network, a third power amplifier, a third bias circuit, a fourth power amplifier, a fourth bias circuit, an output matching network and a signal output end. The power amplifier circuit of the present invention can reach the highest gain in a high-power mode, and can reach the lowest gain in a low-power mode; additionally, the overall efficiency of the power amplifier circuit is improved, and the control flexibility is improved.

Classes IPC  ?

  • H03F 3/19 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs

60.

POWER AMPLIFIER CIRCUIT

      
Numéro d'application CN2024084267
Numéro de publication 2024/222366
Statut Délivré - en vigueur
Date de dépôt 2024-03-28
Date de publication 2024-10-31
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Wei
  • Guo, Jiashuai

Abrégé

Provided in the present invention is a power amplifier circuit. The power amplifier circuit comprises a signal input end, an input matching network, a first transistor, an interstage matching network, a second transistor, an output matching network and a signal output end, which are connected in sequence. An input end of a second resonant circuit is connected to a first output end of a second bias circuit; an emitter of the second transistor is grounded, and a collector electrode of the second transistor is connected in series to a second inductor and is connected to a second power source voltage and is connected to an input end of the output matching network. The power amplifier circuit further comprises a current limiting circuit, wherein a first end of the current limiting circuit is connected to an input end of the interstage matching network; a second end of the current limiting circuit is connected to the input end of the second resonant circuit; and a third end of the current limiting circuit is connected to a second output end of the second bias circuit. The power amplifier circuit in the present invention can improve the gain and efficiency, and the reliability is high.

Classes IPC  ?

  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire
  • H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire

61.

RADIO FREQUENCY POWER AMPLIFIER AND RADIO FREQUENCY POWER AMPLIFIER MODULE

      
Numéro d'application CN2024084273
Numéro de publication 2024/222367
Statut Délivré - en vigueur
Date de dépôt 2024-03-28
Date de publication 2024-10-31
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Wei
  • Guo, Jiashuai

Abrégé

Disclosed in the present invention are a radio frequency power amplifier and a radio frequency power amplifier module. The radio frequency power amplifier comprises a signal input end, an input matching network, a first capacitor, a second capacitor, a first bias circuit, a first power amplifier, a third capacitor, a fourth capacitor, a second bias circuit, a second power amplifier, an interstage matching network, a fifth capacitor, a sixth capacitor, a third bias circuit, a third power amplifier, a seventh capacitor, an eighth capacitor, a fourth bias circuit, a fourth power amplifier, an output matching network, and a signal output end. According to the radio frequency power amplifier in the present invention, deterioration of gain compression and linear distortion of the radio frequency power amplifier can be effectively suppressed.

Classes IPC  ?

  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire
  • H03F 3/189 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence

62.

RAPID SIMULATION METHOD AND SYSTEM FOR MULTI-SYMMETRIC SURFACE ACOUSTIC WAVE DEVICE, AND RELATED DEVICE

      
Numéro d'application CN2024084293
Numéro de publication 2024/222368
Statut Délivré - en vigueur
Date de dépôt 2024-03-28
Date de publication 2024-10-31
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Guan, Peng
  • Zhu, Yuquan
  • Chang, Linsen
  • Chen, Rouxiao
  • Zhong, Yang
  • Yuan, Junping
  • Zhou, Wenhan
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of electromechanical coupling of piezoelectric materials, and particularly relates to a rapid simulation method and system for a multi-symmetric surface acoustic wave device, and a related device. In the present invention, for a special structure of a progressive multi-symmetric surface acoustic wave filter and a matrix symmetry mathematical relationship in a finite element method, during a simulation process of the surface acoustic wave filter, the construction time of a large number of sub-unit matrices and the calculation time of stitching the matrices using a hierarchical cascading technique are reduced by using negation and equivalence relationships of the matrices, thereby improving the simulation speed of the progressive multi-symmetric surface acoustic wave filter, and improving the simulation efficiency.

Classes IPC  ?

  • G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation
  • G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]

63.

SURFACE ACOUSTIC WAVE FILTER AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2024084283
Numéro de publication 2024/217240
Statut Délivré - en vigueur
Date de dépôt 2024-03-28
Date de publication 2024-10-24
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhang, Lei
  • Lu, Jie
  • Li, Shuai
  • Zhong, Lunwei
  • Guo, Jiashuai

Abrégé

The present invention provides a surface acoustic wave filter and a radio frequency chip. The surface acoustic wave filter comprises a piezoelectric substrate, a first longitudinally coupled filter and a second longitudinally coupled filter which are respectively fixed on the piezoelectric substrate and are spaced apart from each other, a bending inductor, a first output terminal, and a second output terminal; the first longitudinally coupled filter comprises a first bus bar and a second bus bar, a first interdigital region, a first reflection grating, and a second reflection grating, the first bus bar is connected to the first output terminal, and the second bus bar is connected to a first end of the bending inductor; the second longitudinally coupled filter comprises a third bus bar, a fourth bus bar, a second interdigital region, a third reflection grating, and a fourth reflection grating, the third bus bar is connected to a second end of the bending inductor, and the fourth bus bar is connected to the second output terminal. According to the surface acoustic wave filter of the present invention, the passband edge insertion loss and standing waves of cascaded longitudinally coupled filters can be effectively reduced, thereby improving the sensitivity of the system and the performance of the filter.

Classes IPC  ?

  • H03H 9/64 - Filtres utilisant des ondes acoustiques de surface

64.

FAST FITTING METHOD AND SYSTEM FOR SIMULATION PARAMETER OF SURFACE ACOUSTIC WAVE DEVICE, AND RELATED DEVICE

      
Numéro d'application CN2024084289
Numéro de publication 2024/217241
Statut Délivré - en vigueur
Date de dépôt 2024-03-28
Date de publication 2024-10-24
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Yuan, Junping
  • Zhong, Yang
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of wireless communications. Provided are a fast fitting method and system for a simulation parameter of a surface acoustic wave device, and a related device. The method comprises: determining a simulation parameter for simulating a surface acoustic wave device; acquiring an actually measured admittance curve of the surface acoustic wave device, and determining an admittance curve feature; matching the simulation parameter with the admittance curve feature, and performing decoupling processing on the simulation parameter, so as to construct a single objective optimization problem about an error parameter between the simulation parameter and the admittance curve feature; iteratively solving the single objective optimization problem by using a gradient estimation method until the error parameter meets a preset error interval constraint, such that a feasible solution for the simulation parameter is obtained; and optimizing the surface acoustic wave device according to the feasible solution for the simulation parameter. The present invention can improve the efficiency of calculating a feasible solution for a simulation parameter, without reducing the feasibility of the solution for the simulation parameter, and compared with the prior art, the stability of the solution achieved by the present invention is higher.

Classes IPC  ?

  • G06F 30/20 - Optimisation, vérification ou simulation de l’objet conçu
  • G06F 111/04 - CAO basée sur les contraintes

65.

THERMAL SIMULATION METHOD AND SYSTEM FOR FILTER MODULE, AND RELATED DEVICE

      
Numéro d'application CN2024079550
Numéro de publication 2024/188070
Statut Délivré - en vigueur
Date de dépôt 2024-03-01
Date de publication 2024-09-19
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhou, Wenhan
  • Li, Shuai
  • Zhang, Lei
  • Lu, Jie
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of surface-acoustic-wave filter simulation. Provided are a thermal simulation method and system for a filter module, and a related device. The method comprises: constructing an equivalent circuit of a filter module which includes resonators and dual-mode surface-acoustic-wave filters; constructing an electrical layout of the filter module; calculating the heating power of each resonator and the heating power of each dual-mode surface-acoustic-wave filter in the filter module on the basis of the equivalent circuit, and the frequency and power of an input signal which is inputted into the filter module; constructing a two-dimensional model of the dual-mode surface-acoustic-wave filters; performing simulation calculation on the basis of the two-dimensional model, so as to obtain temperature distribution data of the dual-mode surface-acoustic-wave filters; establishing a thermal simulation model of the filter module; on the basis of the heating powers, setting a boundary condition of performing thermal simulation by the filter module; and performing heat transfer simulation on the basis of the thermal simulation model and the boundary condition, so as to obtain thermal simulation data of the filter module. The present invention improves the accuracy of thermal simulation data of a filter module.

Classes IPC  ?

  • G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
  • G06F 30/392 - Conception de plans ou d’agencements, p. ex. partitionnement ou positionnement

66.

THERMAL SIMULATION METHOD AND SYSTEM FOR FILTER MODULE, AND RELATED DEVICE

      
Numéro d'application CN2024079555
Numéro de publication 2024/188071
Statut Délivré - en vigueur
Date de dépôt 2024-03-01
Date de publication 2024-09-19
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhou, Wenhan
  • Li, Shuai
  • Zhang, Lei
  • Lu, Jie
  • Guo, Jiashuai

Abrégé

Disclosed in the present invention are a thermal simulation method and system for a filter module, and a related device. The thermal simulation method for the filter module comprises the following steps: establishing an equivalent circuit comprising a resonator and a dual-mode surface acoustic wave filter; drawing an electrical layout; determining the frequency and power of an input signal according to the equivalent circuit, and acquiring the heating power of the resonator and the heating power of the dual-mode surface acoustic wave filter according to the frequency and power of the input signal; establishing a thermal simulation model according to the electrical layout; setting a boundary condition for thermal simulation of the filter module according to the heating power of the resonator and the heating power of the dual-mode surface acoustic wave filter; and performing heat transfer simulation according to the thermal simulation model and the boundary condition to obtain thermal simulation data of the filter module. The thermal simulation method for the filter module in the present invention solves the problem in the related art of being unable to perform heat transfer simulation on a filter module comprising a dual-mode surface acoustic wave filter.

Classes IPC  ?

  • G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]
  • G06F 119/08 - Analyse thermique ou optimisation thermique

67.

ADAPTIVE LINEAR POWER AMPLIFIER AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2024079654
Numéro de publication 2024/183652
Statut Délivré - en vigueur
Date de dépôt 2024-03-01
Date de publication 2024-09-12
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Ma, Erchen
  • Guo, Jiashuai

Abrégé

Provided in the present utility model are an adaptive linear power amplifier and a radio frequency chip. The adaptive linear power amplifier comprises a signal input end, an input matching network, a first transistor and a signal output end, which are successively connected, and an adaptive bias circuit used for providing a bias voltage for the first transistor. The adaptive bias circuit comprises a temperature compensation circuit, a first capacitor, a second transistor, a first resistor and a second capacitor. A first end of the temperature compensation circuit is separately connected to the first capacitor and the second transistor. A second end of the first capacitor is grounded. A collector of the second transistor serves as an input end of the adaptive bias circuit. An emitter of the second transistor is separately connected to a first end of the first resistor and a first end of the second capacitor. A second end of the first resistor and a second end of the second capacitor are connected to serve as an output end of the adaptive bias circuit together. The adaptive linear power amplifier of the present utility model can suppress gain compression, thereby improving the linearity of the power amplifier.

Classes IPC  ?

  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire
  • H03F 1/30 - Modifications des amplificateurs pour réduire l'influence des variations de la température ou de la tension d'alimentation
  • H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
  • H03F 3/20 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C

68.

RADIO FREQUENCY POWER AMPLIFIER AND RADIO FREQUENCY POWER AMPLIFIER MODULE

      
Numéro d'application CN2024079643
Numéro de publication 2024/183649
Statut Délivré - en vigueur
Date de dépôt 2024-03-01
Date de publication 2024-09-12
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Ma, Erchen
  • Guo, Jiashuai

Abrégé

The present application discloses a radio frequency power amplifier and a radio frequency power amplifier module. The radio frequency power amplifier comprises a signal input end, an input matching network, a power amplifier and a signal output end which are connected in sequence; the radio frequency power amplifier further comprises a linearized bias circuit connected to the input end of the power amplifier; and the linearized bias circuit comprises a first resistor, a first triode, a second triode, a first capacitor, a second resistor, a third triode and a third resistor. According to the radio frequency power amplifier, by additionally providing the second resistor connected in series to the first capacitor in the linearized bias circuit, the sensitivity of the branch to frequency is reduced while the linearity is improved, so that the radio frequency power amplifier is suitable for a broadband circuit.

Classes IPC  ?

  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire

69.

LOW-NOISE AMPLIFIER AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2024073941
Numéro de publication 2024/179235
Statut Délivré - en vigueur
Date de dépôt 2024-01-25
Date de publication 2024-09-06
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Su, Junhua
  • Guo, Jiashuai

Abrégé

The present invention provides a low-noise amplifier and a radio frequency chip. The low-noise amplifier comprises a signal input end, a cascode low-noise amplification link comprising a source-level negative feedback inductor, an output matching network, an output resistance attenuation network and a signal output end which are connected in sequence. The low-noise amplifier further comprises a plurality of switches, a bypass matching circuit, and a transistor bias access circuit. The cascode low-noise amplification link comprises a first inductor, a first capacitor, a first transistor, a second transistor, a second inductor, a third inductor, and a second capacitor. The plurality of switches comprise a first switch, a second switch, a third switch, and a fourth switch. A second end of the first inductor is connected to a first end of the first switch and a first end of the second switch, respectively. A second end of the first switch is connected to a first end of the bypass matching circuit and a first end of the fourth switch, respectively. The first end of the fourth switch is grounded. A second end of the bypass matching circuit is connected to a first end of the third switch. The low-noise amplifier of the present invention has diversified modes and functions, high reliability, and a wide application range.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs
  • H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
  • H03F 3/193 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs comportant des dispositifs à effet de champ
  • H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs

70.

MULTI-POWER-SUPPLY SWITCHING CIRCUIT STRUCTURE AND ELECTRONIC DEVICE

      
Numéro d'application CN2024073949
Numéro de publication 2024/179237
Statut Délivré - en vigueur
Date de dépôt 2024-01-25
Date de publication 2024-09-06
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Ren, Xiaojiao
  • Guo, Jiashuai

Abrégé

Disclosed in embodiments of the present invention is a multi-power-supply switching circuit structure, comprising a pre-buck circuit, a switching control circuit, and a power supply switching circuit, wherein the pre-buck circuit comprises a first voltage division unit and second voltage division units; the first voltage division unit is configured to reduce a power supply voltage to generate a first bias voltage; the second voltage division units are each configured to generate a second bias voltage; the switching control circuit is used for performing logical operation on the second bias voltage under the driving of the first bias voltage so as to acquire a switching control signal, and used for, under the driving of the first bias voltage and the switching control signal, enabling one power supply switching unit in the power supply switching circuit to be turned on and other power supply switching units to be turned off, so that the output voltage of a power supply connected to the power supply switching unit that is turned on is outputted by means of the power supply switching unit that is turned on. In this way, the present invention is suitable for high-voltage power supply switching, can achieve level conversion with a wide power supply voltage amplitude, and widen an application range of a power supply switching circuit structure.

Classes IPC  ?

  • H02M 3/158 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu sans transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs avec commande automatique de la tension ou du courant de sortie, p. ex. régulateurs à commutation comprenant plusieurs dispositifs à semi-conducteurs comme dispositifs de commande finale pour une charge unique

71.

POWER AMPLIFIER AND DIFFERENTIAL POWER AMPLIFIER CIRCUIT

      
Numéro d'application CN2024073972
Numéro de publication 2024/179241
Statut Délivré - en vigueur
Date de dépôt 2024-01-25
Date de publication 2024-09-06
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Wei
  • Guo, Jiashuai

Abrégé

The present utility model provides a power amplifier and a differential power amplifier circuit. The power amplifier comprises a signal input end, an input impedance matching circuit, a third transistor, an interstage matching circuit, a first transistor, a second transistor, an output impedance matching circuit, a signal output end, a first capacitor, a first inductor, a second inductor, and a third inductor; a collector of the first transistor is separately connected to a first end of the first capacitor and a second end of the first inductor; a first end of the first inductor is connected to a power supply voltage; a second end of the first capacitor is separately connected to an emitter of the second transistor and a first end of the second inductor; a second end of the second inductor is grounded; a collector of the second transistor is separately connected to a second end of the third inductor and the signal output end; a first end of the third inductor is connected to the power supply voltage. Compared with the related art, the power amplifier and the differential power amplifier circuit of the present utility model have high saturation power.

Classes IPC  ?

  • H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs

72.

LOW NOISE AMPLIFIER AND RADIO-FREQUENCY CHIP

      
Numéro d'application CN2024073945
Numéro de publication 2024/179236
Statut Délivré - en vigueur
Date de dépôt 2024-01-25
Date de publication 2024-09-06
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Su, Junhua
  • Guo, Jiashuai

Abrégé

Provided in the present invention are a low noise amplifier and a radio-frequency chip. The low noise amplifier comprises a signal input end, a cascode low-noise amplification link including a source degenerated inductor, an output matching network, an output resistance attenuation network, a signal output end, a first switch, a third switch, a fourth switch, a bypass matching circuit, a transistor bias access circuit and a control logic circuit, wherein the output matching network comprises a first output matching circuit and a second output matching circuit; the cascode low-noise amplification link comprises a first inductor, a second switch, a first capacitor, a first transistor, a second transistor, a second inductor and a third inductor; and the control logic circuit is used for respectively controlling switch actions for turning on or turning off the transistor bias access circuit, the first switch, the second switch, the third switch and the fourth switch. Compared with the related art, the technical solution of the present invention provides diversified functions for use, effectively implements out-of-band narrow-band suppression of an independent frequency band, and has a high anti-interference capability and high sensitivity.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs
  • H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire

73.

METHOD FOR OPTIMIZING DESIGN OF ACOUSTIC SURFACE FILTER, RELATED DEVICE, AND STORAGE MEDIUM

      
Numéro d'application CN2024073952
Numéro de publication 2024/179238
Statut Délivré - en vigueur
Date de dépôt 2024-01-25
Date de publication 2024-09-06
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Guo, Jiashuai

Abrégé

Embodiments of the present invention provide a method for optimizing design of an acoustic surface filter, a design optimizing device, and a computer-readable storage medium. The method for optimizing design of an acoustic surface filter comprises: performing modeling to obtain a model, then outputting optimization parameters, and setting optimization objectives; determining whether an insertion loss parameter meets an optimization objective corresponding thereto; if not, performing calculation on the model by using a preset first optimization function, updating a calculated result to the optimization parameters, and then returning to a previous step; if yes, performing calculation on the model by using a preset second optimization function and updating a calculated result to the optimization parameters; determining whether an out-of-band suppression parameter and the insertion loss parameter meet relative optimization objectives at the same time; if not, returning to a previous step; or if yes, outputting an optimization result of the model. Compared with the existing technology, by using the technical solution of the present invention, the dependence on an initial value can be reduced and the effect of an optimization result is good.

Classes IPC  ?

  • G06F 30/20 - Optimisation, vérification ou simulation de l’objet conçu
  • G06F 17/15 - Calcul de fonction de corrélation
  • H03H 9/64 - Filtres utilisant des ondes acoustiques de surface

74.

RADIO FREQUENCY POWER AMPLIFIER CIRCUIT AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2024073954
Numéro de publication 2024/179239
Statut Délivré - en vigueur
Date de dépôt 2024-01-25
Date de publication 2024-09-06
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Qi, Wei
  • Guo, Jiashuai

Abrégé

Provided are a radio frequency power amplifier circuit and a radio frequency chip. The radio frequency power amplifier circuit comprises a radio frequency input end, an input matching circuit, a first transistor, a bias circuit, and a radio frequency output end. The radio frequency input end is connected to the input end of the input matching circuit. The output end of the input matching circuit is connected to the base of the first transistor and the output end of the bias circuit, respectively. The emitter of the first transistor is grounded, and the collector of the first transistor is connected to the radio frequency output end. The bias circuit comprises a first resistor, a second resistor, a third resistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a first capacitor. Compared with the related art, the radio frequency power amplifier circuit and the radio frequency chip have good linearity and high efficiency.

Classes IPC  ?

  • H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
  • H03F 1/30 - Modifications des amplificateurs pour réduire l'influence des variations de la température ou de la tension d'alimentation
  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire
  • H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
  • H03F 3/19 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs
  • H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs

75.

AC VOLTAGE STACKED POWER AMPLIFIER

      
Numéro d'application CN2024073936
Numéro de publication 2024/174799
Statut Délivré - en vigueur
Date de dépôt 2024-01-25
Date de publication 2024-08-29
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Wei
  • Guo, Jiashuai

Abrégé

The present invention provides an AC voltage stacked power amplifier, comprising a signal input end, an input matching network, a driving stage amplifier, an inter-stage matching network, and an AC voltage stacked circuit, an output matching network, a signal output end, and a bias circuit which are connected in sequence; the base of a first transistor serves as a first input end and is connected to an output end of the inter-stage matching network; the collector of the first transistor is connected to a first end of a first capacitor and a first end of a first inductor, separately; a second end of the first inductor serves as a second input end and is connected to a second DC power supply voltage; a second end of the first capacitor is connected to a first end of a second inductor and the emitter of a second transistor, separately; the base of the second transistor serves as a third input end and is connected to an output end of the bias circuit; the collector of the second transistor serves as a fourth input end and is connected to the second DC power supply voltage and an output end of the AC voltage stacked circuit. The AC voltage stacked power amplifier of the present invention can increase the saturation power and the gain.

Classes IPC  ?

  • H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs

76.

FILTER WAFER LEVEL PACKAGE MODULE AND RADIO FREQUENCY MODULE

      
Numéro d'application CN2024073928
Numéro de publication 2024/174797
Statut Délivré - en vigueur
Date de dépôt 2024-01-25
Date de publication 2024-08-29
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Guo, Jiashuai

Abrégé

Disclosed in the present utility model are a filter wafer level package module and a radio frequency module. The filter wafer level package module comprises: a substrate, one surface of the substrate serving as a mounting surface; resonators, the resonators being fixed to the mounting surface; cofferdams, each cofferdam being an annular structure, the cofferdams being fixed to the mounting surface and arranged at intervals around the resonators, and the inner side surface of each cofferdam being an uneven surface; solder ball assemblies, the multiple solder ball assemblies being fixed at intervals to the mounting surface; and a cover plate, the cover plate being fixed to the sides of the cofferdams away from the substrate and defining a cavity together with the substrate and the cofferdams, and the solder ball assemblies extending outwards through the cover plate. The filter wafer level package module in the present embodiments can absorb redundant surface acoustic waves emitted by the resonators, so as to reduce the possibility of producing clutters caused by the reflected surface acoustic waves and to increase Q factors of the resonators, thus improving the filter performance.

Classes IPC  ?

  • H03H 1/00 - Détails de réalisation des réseaux d'impédances dont le mode de fonctionnement électrique n'est pas spécifié ou est applicable à plus d'un type de réseau

77.

MINIATURIZED HIGH-SELECTIVITY IPD BAND-PASS FILTER AND RADIO FREQUENCY FRONT END

      
Numéro d'application CN2023128884
Numéro de publication 2024/164584
Statut Délivré - en vigueur
Date de dépôt 2023-10-31
Date de publication 2024-08-15
Propriétaire
  • SOUTH CHINA UNIVERSITY OF TECHNOLOGY (Chine)
  • LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhang, Xiuyin
  • Xia, Yu
  • Xu, Jinxu
  • He, Jiangbo
  • Zhang, Jialong
  • Xuan, Kai
  • Long, Hua

Abrégé

Disclosed in the present invention are a miniaturized high-selectivity IPD band-pass filter and a radio frequency front end. The miniaturized high-selectivity IPD band-pass filter comprises four resonators composed of lumped capacitors and lumped inductors. Adjacent resonators are coupled by means of a lumped capacitor. The four resonators are a first resonator, a second resonator, a third resonator and a fourth resonator, respectively; the first, third and fourth resonators are formed by connecting lumped capacitors and lumped inductors in parallel to respectively form single zero points on both sides of a pass band. The second resonator comprises a Π-type network, two parallel resonant networks and a lumped inductor. Two branches of the Π-type network are connected to the two parallel resonant networks, respectively, and then are grounded via the same lumped inductor to form three zero points on both sides of the pass band. According to the present invention, the high selectivity and wide stop band of a circuit are ensured, enabling the index requirements of a 5G communication radio frequency front-end module for filter devices to be well met.

Classes IPC  ?

  • H03H 1/00 - Détails de réalisation des réseaux d'impédances dont le mode de fonctionnement électrique n'est pas spécifié ou est applicable à plus d'un type de réseau

78.

DUPLEXER WAFER-LEVEL PACKAGING METHOD AND STRUCTURE, AND RADIO-FREQUENCY MODULE

      
Numéro d'application CN2024073929
Numéro de publication 2024/164846
Statut Délivré - en vigueur
Date de dépôt 2024-01-25
Date de publication 2024-08-15
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Guo, Jiashuai

Abrégé

The present invention provides a duplexer wafer-level packaging method and structure, and a radio-frequency module. The packaging method comprises the following steps: S1, providing a piezoelectric substrate; S2, manufacturing a first interdigital assembly and a second interdigital assembly on the piezoelectric substrate by means of a photolithography process; S3, forming a first cofferdam and a second cofferdam on the piezoelectric substrate by means of the photolithography process; S4, forming, by means of the photolithography process, a cover plate that covers the first cofferdam and the second cofferdam at the same time, and forming a first notch, a second notch and a third notch on the cover plate by means of the photolithography process; S5, respectively electroplating a first filling layer, a second filling layer and a third filling layer at the positions of the piezoelectric substrate corresponding to the first notch, the second notch and the third notch by means of an electroplating process; and S6, respectively growing solder balls on the first filling layer and the third filling layer to complete packaging. A duplexer manufactured by the duplexer wafer-level packaging method of the present invention has a simple structure, and the spatial isolation performance is improved, thereby reducing electromagnetic crosstalk in space, and facilitating improvement of the isolation degree of the duplexer.

Classes IPC  ?

  • H03H 3/007 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques

79.

LOW-POWER-CONSUMPTION RADIO FREQUENCY SWITCH CIRCUIT AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2024070883
Numéro de publication 2024/160015
Statut Délivré - en vigueur
Date de dépôt 2024-01-05
Date de publication 2024-08-08
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Guo, Jiashuai
  • Ji, Bo

Abrégé

Provided in the present invention are a low-power-consumption radio frequency switch circuit and a radio frequency chip. The low-power-consumption radio frequency switch circuit comprises: a control unit, a power supply unit, a driving unit and a switch unit, which are electrically connected in sequence, wherein the power supply unit comprises a clock oscillator and a charge pump; the control unit is used for increasing, within an on/off state switching time period of the switch unit, an initial frequency generated by the clock oscillator to a driving frequency of the driving unit for switching the switch unit; and the control unit is further used for restoring the driving frequency generated by the clock oscillator to the initial frequency after the on/off state switching process of the switch unit is completed. The clock oscillator in the low-power-consumption radio frequency switch circuit of the present invention can ensure that the driving unit has a relatively high current to switch between the on and off states of the switch unit without the need for generating a relatively high frequency all the time, thereby reducing the power consumption of the low-power-consumption radio frequency switch circuit.

Classes IPC  ?

  • H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ

80.

RADIO FREQUENCY SWITCHING CIRCUIT AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2024070872
Numéro de publication 2024/160014
Statut Délivré - en vigueur
Date de dépôt 2024-01-05
Date de publication 2024-08-08
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Guo, Jiashuai
  • Ji, Bo

Abrégé

Provided in the present invention are a radio frequency switching circuit and a radio frequency chip. The radio frequency switching circuit comprises a power supply unit, a driving unit, a control unit, a switching unit and a signal output end, which are sequentially electrically connected, wherein the control unit comprises a first switch, a second switch, a third switch and a resistor, a first end of the first switch is connected to a positive voltage output end of the driving unit, a first end of the second switch is connected to a negative voltage output end of the driving unit, a second end of the first switch is connected to a second end of the second switch, which are then connected to an input end of the switching unit after being connected to the resistor in series, and the third switch is connected to the resistor in parallel; and the control unit is used for realizing the switching on/off state of the first switch, the second switch and the third switch according to a preset control timing, so as to realize the switching on/off state of the switching unit. The radio frequency switching circuit and the radio frequency chip of the present invention achieve a high switch switching speed, and can be widely applied.

Classes IPC  ?

  • H03K 17/041 - Modifications pour accélérer la commutation sans réaction du circuit de sortie vers le circuit de commande
  • H03K 17/296 - Modifications pour permettre un choix d'intervalles de temps pour exécuter plusieurs opérations de commutation et arrêtant automatiquement leur fonctionnement lorsque le programme est terminé
  • H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ

81.

ACTIVE DEVICE CHIP

      
Numéro d'application CN2024070864
Numéro de publication 2024/152929
Statut Délivré - en vigueur
Date de dépôt 2024-01-05
Date de publication 2024-07-25
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Wei, Xinghui
  • Hu, Bin
  • Guo, Jiashuai

Abrégé

Provided in the present invention is an active device chip. The active device chip comprises a substrate, active devices and metal connection lines, wherein each active device comprises a plurality of transistors; the metal connection lines comprise first metal connection lines, second metal connection lines and third metal connection lines; the substrate is provided with a central point, and an external circuit implements power supply and signal transmission for the active device chip by means of the position of the central point; all the active devices are distributed in a radioactive radiation manner taking the central point as a circle center, the distances from the active devices to the central point being the same, and the active devices being arranged at equal intervals from each other; each radio-frequency input end extends to the position of the central point by means of the first metal connection lines of the same length; each radio-frequency output end extends to the position of the central point by means of the second metal connection lines of the same length; and each bias voltage feed point extends to the position of the central point by means of the third metal connection lines of the same length. Compared with the related art, a power amplifier using the active device chip in the present invention has a high level of efficiency.

Classes IPC  ?

  • H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface

82.

RADIO-FREQUENCY SWITCH CIRCUIT

      
Numéro d'application CN2024070829
Numéro de publication 2024/149169
Statut Délivré - en vigueur
Date de dépôt 2024-01-05
Date de publication 2024-07-18
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Guo, Jiashuai
  • Ji, Bo

Abrégé

The present invention provides a radio-frequency switch circuit, comprising a driving unit and a switch unit which are connected in sequence. The switch unit comprises an antenna interface end, a radio-frequency interface end, switch transistors, and resistors. The antenna interface end is used for connecting an external antenna to receive and transmit a radio-frequency signal. The radio-frequency interface end is used for transmitting the radio-frequency signal to an internal system. There are a plurality of switch transistors sequentially connected in series. There are a plurality of resistors having one-to-one correspondence to the switch transistors. The driving unit is connected in series to at least one resistor and then connected to a switch control end of the corresponding switch transistor. In the direction from the antenna interface end to the radio-frequency interface end, the resistance values of the resistors connected in series to the corresponding switch transistors are sequentially decreased. Compared with the prior art, the radio-frequency switch circuit of the present invention can effectively isolate radio-frequency signals and has high input power.

Classes IPC  ?

  • H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ

83.

HETEROGENEOUSLY INTEGRATED ELASTIC WAVE FILTER AND RADIO-FREQUENCY CHIP

      
Numéro d'application CN2023138143
Numéro de publication 2024/140167
Statut Délivré - en vigueur
Date de dépôt 2023-12-12
Date de publication 2024-07-04
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Zhang, Lei
  • Yang, Ruizhi
  • Li, Shuai
  • Guo, Jiashuai

Abrégé

Provided in the present invention are a heterogeneously integrated elastic wave filter and a radio-frequency chip. The heterogeneously integrated elastic wave filter comprises a piezoelectric substrate, a surface acoustic wave resonator and a transversely excited thin-film bulk acoustic wave resonator, wherein the piezoelectric substrate comprises a support layer, a sacrificial layer and a piezoelectric layer, the sacrificial layer being made of polysilicon or silicon dioxide, and the piezoelectric layer being made of a piezoelectric material; the surface acoustic wave resonator comprises a first interdigital transducer and a first bus bar; the transversely excited thin-film bulk acoustic wave resonator comprises a second interdigital transducer and a second bus bar, the second bus bar being electrically connected to both the second interdigital transducer and the first bus bar; and the piezoelectric substrate is further provided with a cavity formed by etching of the sacrificial layer, an orthographic projection of the transversely excited thin-film bulk acoustic wave resonator toward the piezoelectric substrate is located entirely within the cavity, and an orthographic projection of the surface acoustic wave resonator toward the piezoelectric substrate is located entirely outside the cavity. Compared with the related art, the technical solution of the present invention has a wide operation frequency range, good out-of-band rejection performance, a high degree of integration and a small volume.

Classes IPC  ?

  • H03H 1/00 - Détails de réalisation des réseaux d'impédances dont le mode de fonctionnement électrique n'est pas spécifié ou est applicable à plus d'un type de réseau

84.

BARE DIE PACKAGING MODULE OF FILTER AND RADIO FREQUENCY MODULE

      
Numéro d'application CN2023138155
Numéro de publication 2024/140168
Statut Délivré - en vigueur
Date de dépôt 2023-12-12
Date de publication 2024-07-04
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Guo, Jiashuai

Abrégé

Disclosed in the utility model are a bare die packaging module of a filter and a radio frequency module. The bare die packaging module of the filter comprises: a circuit base board; a substrate facing and supported at an interval on one surface of the circuit base board; an interdigital transducer fixed to the side of the substrate close to the circuit base board; a plurality of substrate solder ball assemblies fixed at intervals to the side of the substrate close to the circuit base board; copper column baffles fixed to the side of the substrate close to the circuit base board and arranged at intervals with the circuit base board; a cover plate layer fixed to the circuit base board in a covering mode and completely covering the substrate; and a substrate protection layer sandwiched between the cover plate layer and the substrate. The bare die packaging module of the filter in this embodiment can use the copper column baffles to block the overflow of a mold material of the cover plate layer into a cavity when filling, so as to ensure the cleanliness of the cavity and the normal operation of the interdigital transducer.

Classes IPC  ?

  • H10N 30/88 - MonturesSupportsEnveloppesBoîtiers
  • H01L 23/16 - Matériaux de remplissage ou pièces auxiliaires dans le conteneur, p. ex. anneaux de centrage
  • H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
  • H03H 9/05 - Supports
  • H03H 9/10 - Montage dans des boîtiers
  • H03H 9/46 - Filtres

85.

BARE DIE PACKAGING STRUCTURE OF FILTER, AND RADIO FREQUENCY MODULE

      
Numéro d'application CN2023138161
Numéro de publication 2024/140170
Statut Délivré - en vigueur
Date de dépôt 2023-12-12
Date de publication 2024-07-04
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Guo, Jiashuai

Abrégé

Provided in the embodiments of the present invention are a bare die packaging structure of a filter, and a radio frequency module. The bare die packaging structure of a filter comprises: a circuit substrate; a base; an interdigital transducer spaced apart from the circuit substrate; base solder balls, wherein a plurality of base solder balls are comprised and are fixed to the side of the base close to the circuit substrate, the base solder balls and the interdigital transducer are spaced apart from each other, the base is supported on and fixed to the circuit substrate by means of the base solder balls and forms electrical connection, and welding materials used by at least some of the base solder balls have different ratios, such that the base solder balls at different positions have different degrees of subsidence under the same reflow soldering temperature condition, the base is arranged obliquely relative to the circuit substrate, and an oblique cavity is formed by the base and the circuit substrate; a cover plate layer; and a base protection layer. The bare die packaging structure of a filter of the present invention is convenient to package and has high production efficiency and good module quality.

Classes IPC  ?

86.

MANUFACTURING METHOD FOR SURFACE ACOUSTIC WAVE FILTER AND SURFACE ACOUSTIC WAVE FILTER

      
Numéro d'application CN2023138170
Numéro de publication 2024/140171
Statut Délivré - en vigueur
Date de dépôt 2023-12-12
Date de publication 2024-07-04
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Guo, Jiashuai

Abrégé

Embodiments of the present invention provide a manufacturing method for a surface acoustic wave filter and a surface acoustic wave filter. The manufacturing method comprises the following steps: S1, acquiring a first cavity and a second cavity, forming a first substrate on the first cavity, and forming a second substrate on the second cavity; S2, growing an insulating layer on the side of a first busbar away from the first substrate, wherein the insulating layer is located on the periphery of the first substrate; S3, forming, on the insulating layer, a through hole communicated with the first busbar; S4, filling the through hole with a conductive material by means of an electroplating process, and extending the conductive material to cover the side of the insulating layer away from the first substrate, wherein the conductive material is electrically connected to the first busbar; and S5, stacking a second busbar of a second resonance unit on the conductive material, so that a first resonance unit and the second resonance unit are bonded, to obtain a surface acoustic wave filter. The surface acoustic wave filter of the present invention is convenient to package, and has small overall device area and good pressure resistance performance.

Classes IPC  ?

  • H03H 3/08 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface

87.

INPUT THIRD-ORDER INTERCEPT POINT TEST METHOD, RELATED SYSTEM, AND STORAGE MEDIUM

      
Numéro d'application CN2023138036
Numéro de publication 2024/125484
Statut Délivré - en vigueur
Date de dépôt 2023-12-12
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Xue, Hou
  • Guo, Jiashuai

Abrégé

Provided in the embodiments of the present invention are an input third-order intercept point test method, a test system, and a computer-readable storage medium. The input third-order intercept point test method comprises: powering up a low-noise amplifier; generating a continuous and directional input signal, and then sending the input signal to the low-noise amplifier, such that the low-noise amplifier amplifies the input signal to obtain an output signal and outputs same, wherein the input signal is provided with two power spectrums output at a preset amplitude; acquiring a measured value of the output signal in real time; and collecting measured values corresponding to all frequency points that appear during a frequency sweep process performed at a second frequency f2, then calculating, according to a preset formula, a measured value corresponding to each frequency point, and obtaining a corresponding input third-order intercept point, which is IIP3, wherein the preset formula is IIP3 = P + (P1 - P2) / 2. Compared with the related art, the technical solution of the present invention is used, such that an input third-order intercept point of multi frequency points can be obtained by means of testing, and the testing efficiency is high.

Classes IPC  ?

  • H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire

88.

INTERMODULATION MEASUREMENT DEVICE

      
Numéro d'application CN2023138074
Numéro de publication 2024/125493
Statut Délivré - en vigueur
Date de dépôt 2023-12-12
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Xue, Hou
  • Guo, Jiashuai

Abrégé

The present application provides an intermodulation measurement device, comprising a multi-tone signal generator, a low-noise amplifier, a spectrum analyzer, and a data correcting and capturing system which are electrically connected in sequence. An output end of the multi-tone signal generator is connected to an input end of the low-noise amplifier by means of a first line; an output end of the low-noise amplifier is connected to an input end of the spectrum analyzer by means of a second line; the output end of the multi-tone signal generator and an output end of the spectrum analyzer are respectively connected to the data correcting and capturing system; the first line and the second line are homogeneous connecting lines having the same length; and the data correcting and capturing system is used for separately measuring the loss of the first line and the loss of the second line. The intermodulation measurement device of the present application has accurate measurement and high reliability.

Classes IPC  ?

89.

WAFER LEVEL SURFACE ACOUSTIC WAVE FILTER AND RADIO FREQUENCY MODULE CHIP

      
Numéro d'application CN2023138122
Numéro de publication 2024/125502
Statut Délivré - en vigueur
Date de dépôt 2023-12-12
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Zhou, Wenhan
  • Li, Shuai
  • Zhang, Lei
  • Yang, Ruizhi
  • Guo, Jiashuai

Abrégé

Provided in the present invention are a wafer level surface acoustic wave filter and a radio frequency module chip. The wafer level surface acoustic wave filter comprises: a substrate; a finger assembly; a cofferdam; a cover plate provided with a plurality of through holes penetrating the cover plate, wherein the plurality of through holes comprise a plurality of first through holes, which are disposed opposite each other, and a second through hole; a plurality of metal columns, which are located on an inner side of the cofferdam and are respectively fixed to the substrate and inserted into at least one corresponding first through hole; a pad, which is fixed in the second through hole; and solder balls, which comprise a plurality of signal solder balls and a dummy solder ball, wherein one signal solder ball is fixed to the end of each metal column away from the substrate; the dummy solder ball and an inductive winding are fixed to the pad; the inductive winding is wound around the cover plate; and two ends of the inductive winding are respectively connected to the dummy solder ball and any one of the signal solder balls. The wafer level surface acoustic wave filter of the present invention has a simple structure, and improves the inductance value of an inductive winding inductor in a radio frequency module.

Classes IPC  ?

  • H03H 9/64 - Filtres utilisant des ondes acoustiques de surface
  • H03H 9/02 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiquesRésonateurs électromécaniques Détails
  • H03H 9/05 - Supports
  • H03H 9/10 - Montage dans des boîtiers

90.

VOLTAGE-SYNTHESIS-TYPE DOHERTY POWER AMPLIFIER

      
Numéro d'application CN2023132878
Numéro de publication 2024/125227
Statut Délivré - en vigueur
Date de dépôt 2023-11-21
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Peng, Yanjun
  • Xuan, Kai
  • Guo, Jiashuai

Abrégé

Provided in the present invention is a voltage-synthesis-type Doherty power amplifier, comprising an adaptive input power divider, a power amplifier network and a voltage-synthesis-type power synthesis network, wherein the adaptive input power divider comprises a first capacitor, a second capacitor and a first inductor; the power amplifier network comprises a first phase compensation network, a first input matching network, a carrier power amplifier, a second phase compensation network, a second input matching network, a peak power amplifier and an impedance inversion network; and the voltage-synthesis-type power synthesis network comprises a balun transformer unit and a port impedance conversion network. Input power for power amplification of the voltage-synthesis-type Doherty power amplifier in the present invention is automatically allocated, the efficiency is high, and output power has high linearity.

Classes IPC  ?

  • H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire

91.

RADIO FREQUENCY SWITCH CIRCUIT AND RADIO FREQUENCY CHIP

      
Numéro d'application CN2023132887
Numéro de publication 2024/125229
Statut Délivré - en vigueur
Date de dépôt 2023-11-21
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Ji, Bo
  • Guo, Jiashuai

Abrégé

Provided in the present invention are a radio frequency switch circuit and a radio frequency chip. The radio frequency switch circuit comprises, successively connected, a control unit, a power supply unit, a driving unit and a switch unit; the control unit controls the power supply unit to generate an adjustable supply voltage and to output the supply voltage to the driving unit; the driving unit controls the switch unit to be switched on or off; the adjustable supply voltage generated by the control unit controlling the power supply unit has an adjustable absolute value of the supply voltage, and an adjustable slope of the supply voltage varying with the temperature. The control unit controlling the power supply unit to output the adjustable supply voltage may further adjust the absolute value of the supply voltage and adjust the slope of the supply voltage varying with the temperature. Increasing the supply voltage of the switch in the on state can ameliorate the insertion loss and the linearity property of the radio frequency switch at high temperature. The radio frequency switch circuit and the radio frequency chip of the present invention can simultaneously ameliorate the insertion losses and the linearity properties of radio frequency switches at high temperature.

Classes IPC  ?

  • H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ
  • H03K 17/081 - Modifications pour protéger le circuit de commutation contre la surintensité ou la surtension sans réaction du circuit de sortie vers le circuit de commande

92.

RADIO FREQUENCY POWER AMPLIFIER AND RADIO FREQUENCY MODULE

      
Numéro d'application CN2023132900
Numéro de publication 2024/125230
Statut Délivré - en vigueur
Date de dépôt 2023-11-21
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Xu, Liang
  • Guo, Jiashuai

Abrégé

The present invention provides a radio frequency power amplifier and a radio frequency module. The radio frequency power amplifier comprises a base plate input unit, a power amplifier unit and a base plate output unit; the power amplifier unit comprises a first input radio frequency matching network, a first driver-stage power amplifier, a first inter-stage matching network, a first amplifier-stage power amplifier, a second input radio frequency matching network, a second driver-stage power amplifier, a second inter-stage matching network, a second amplifier-stage power amplifier, a twelfth capacitor, a thirteenth capacitor and a ninth capacitor; the first input radio frequency matching network comprises a third capacitor and a third inductor; the first inter-stage matching network comprises a seventh inductor, a fifth capacitor, a fifth inductor and a seventh capacitor; the second input radio frequency matching network comprises a fourth capacitor and a fourth inductor; the second inter-stage matching network comprises an eighth inductor, a sixth capacitor, a sixth inductor and an eighth capacitor. The technical solution of the present invention achieves a wide operating bandwidth, and a good harmonic suppression effect when the output power is high.

Classes IPC  ?

  • H03F 3/20 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C

93.

RADIO FREQUENCY POWER AMPLIFIER AND SUBSTRATE MODULE

      
Numéro d'application CN2023132912
Numéro de publication 2024/125231
Statut Délivré - en vigueur
Date de dépôt 2023-11-21
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Xu, Liang
  • Guo, Jiashuai

Abrégé

The present invention provides a radio frequency power amplifier and a substrate module. The radio frequency power amplifier comprises a substrate input unit, a power amplifier unit, and a substrate output unit; the substrate input unit receives a single-ended signal and converts the single-ended signal into two first signals; the power amplifier unit amplifies the power of the two first signals and suppresses the second-order harmonic of a dominant frequency to generate two second signals; the substrate output unit receives the two second signals, then performs power synthesis and conversion into a third signal, suppresses the harmonic of the third signal and then outputs the third signal; and the power amplifier unit comprises a first input radio frequency matching network, a first driving-stage power amplifier, a first interstage matching network, a first amplification-stage power amplifier, a second input radio frequency matching network, a second driving-stage power amplifier, a second interstage matching network, a second amplification-stage power amplifier, a twelfth capacitor, a thirteenth capacitor, and a ninth capacitor. According to the technical solution of the present invention, the working frequency bandwidth is high, and the harmonic suppression effect is good when the output power is high.

Classes IPC  ?

  • H03F 3/20 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C

94.

LOW-NOISE AMPLIFIER AND RADIO FREQUENCY RECEIVING MODULE

      
Numéro d'application CN2023132992
Numéro de publication 2024/125234
Statut Délivré - en vigueur
Date de dépôt 2023-11-21
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zeng, Xun
  • Guo, Jiashuai

Abrégé

The present invention provides a low-noise amplifier and a radio frequency receiving module. The low-noise amplifier comprises a signal input end, an input matching circuit, an amplifier circuit, an output matching circuit, and a signal output end which are electrically connected in sequence. The input matching circuit comprises a first capacitor, a transformer, and a first negative feedback inductor. The transformer comprises a primary coil inductor, a secondary coil inductor and a coupling coefficient for coupling the primary coil inductor and the secondary coil inductor. The low-noise amplifier of the present invention can improve the input matching effect of broadband, thereby avoiding mismatching of the low-noise amplifier caused by changes of factors such as an environment temperature, a frequency, a signal source and a load.

Classes IPC  ?

  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs

95.

RADIO FREQUENCY AMPLIFIER MODULE AND SATELLITE COMMUNICATION TERMINAL

      
Numéro d'application CN2023133003
Numéro de publication 2024/125237
Statut Délivré - en vigueur
Date de dépôt 2023-11-21
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Xu, Liang
  • Guo, Jiashuai

Abrégé

Provided in the present invention are a radio frequency amplifier module and a satellite communication terminal. The radio frequency amplifier module comprises a first-stage power gain amplification unit, an inter-stage power distribution unit, a second-stage power gain amplification unit and a power synthesis output unit. The first-stage power gain amplification unit is used for receiving an external single-ended signal, and amplifying the power and gain of the single-ended signal to generate a single-ended amplified signal. The inter-stage power distribution unit is used for receiving the single-ended amplified signal and converting same into two first signals having the same power and a phase difference of 180°. The second-stage power gain amplification unit is used for amplifying the power and gain of the two first signals to generate two second signals. The power synthesis output unit is used for receiving the two second signals processed by the second-stage power gain amplification unit, carrying out power synthesis to convert same into a third signal, suppressing harmonics of the third signal and then outputting same. The technical solution of the present invention exhibits high output power gain, and good harmonic suppression effects.

Classes IPC  ?

  • H03F 3/24 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie
  • H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs
  • H04B 1/16 - Circuits

96.

WAFER-LEVEL SURFACE ACOUSTIC WAVE FILTER AND RADIO-FREQUENCY MODULE CHIP

      
Numéro d'application CN2023138115
Numéro de publication 2024/125501
Statut Délivré - en vigueur
Date de dépôt 2023-12-12
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Yang, Ruizhi
  • Li, Shuai
  • Zhang, Lei
  • Guo, Jiashuai

Abrégé

The present invention provides a wafer-level surface acoustic wave filter and a radio-frequency module chip. The wafer-level surface acoustic wave filter comprises: a substrate; an interdigital assembly, comprising interdigital members, a bus bar, and a metal plate which are formed on the substrate by means of lithographic silk-screen printing; a cofferdam, fixed to the substrate; a cover plate, covering the cofferdam and provided with a plurality of through holes passing through the cover plate; a plurality of metal columns, fixed to the substrate and respectively inserted into corresponding through holes; a metal common-ground layer, attached to the side of the cover plate away from the interdigital assembly, wherein some of the metal columns are electrically connected to the metal common-ground layer to form a common-ground signal end, and the remaining metal columns are insulated from the metal common-ground layer to form a signal input end and a signal output end; and solder balls, one solder ball being fixedly arranged at the end of each metal column away from the substrate. The wafer-level surface acoustic wave filter of the present invention has a simple structure, good anti-abrasion performance, and high WLP reliability.

Classes IPC  ?

  • H03H 9/64 - Filtres utilisant des ondes acoustiques de surface
  • H03H 9/10 - Montage dans des boîtiers

97.

SURFACE ACOUSTIC WAVE FILTER MANUFACTURING METHOD AND SURFACE ACOUSTIC WAVE FILTER

      
Numéro d'application CN2023138133
Numéro de publication 2024/125504
Statut Délivré - en vigueur
Date de dépôt 2023-12-12
Date de publication 2024-06-20
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Hu, Jinzhao
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the field of semiconductor processing and manufacturing, and in particular, relates to a surface acoustic wave filter manufacturing method and a surface acoustic wave filter. The manufacturing method comprises: S1, acquiring a piezoelectric substrate for surface acoustic wave filter manufacturing; S2, etching the surface of the piezoelectric substrate, so that a plurality of trenches are formed in the piezoelectric substrate; S3, filling each trench with an electrode metal; S4, plating electrodes on the exposed parts, exposed on the surface of the piezoelectric substrate, of every two adjacent electrode metals and the surface, located between the two adjacent electrode metals, of the piezoelectric substrate, so that a plurality of interdigital transducers are formed on the surface of the piezoelectric substrate; S5, plating a reflecting grating on the surface of the piezoelectric substrate to obtain a single resonator cavity for a surface acoustic wave filter; and S6, combining different resonator cavities according to electrical characteristics to obtain the surface acoustic wave filter. According to the present invention, the available frequency range of the surface acoustic wave filter is expanded by means of special-shaped interdigital transducers.

Classes IPC  ?

  • H03H 3/08 - Appareils ou procédés spécialement adaptés à la fabrication de réseaux d'impédance, de circuits résonnants, de résonateurs pour la fabrication de résonateurs ou de réseaux électromécaniques pour la fabrication de résonateurs ou de réseaux utilisant des ondes acoustiques de surface

98.

SIMULATION METHOD AND SYSTEM FOR REDUCING DIMENSIONS OF UNIT MATRIX, AND RELATED DEVICE

      
Numéro d'application CN2023132522
Numéro de publication 2024/120159
Statut Délivré - en vigueur
Date de dépôt 2023-11-20
Date de publication 2024-06-13
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Guan, Peng
  • Yang, Ruizhi
  • Hu, Jinzhao
  • Chang, Linsen
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of force and electricity coupling of piezoelectric materials. Provided are a simulation method and system for reducing the dimensions of a unit matrix, and a related device. The simulation method comprises: acquiring a geometric structure of a surface acoustic wave device, and dividing the surface acoustic wave device into a plurality of basic structures according to the geometric structure; constructing a weight function and a gradient function which are used for a finite element method, and constructing a six-node quadrilateral unit according to the weight function and the gradient function; performing grid division on the basic structures according to the finite element method, and calculating, by using the six-node quadrilateral unit, simulated unit matrixes corresponding to the basic structures; and splicing and cascading the simulated unit matrixes obtained from different basic structures, so as to obtain a simulated overall matrix, and calculating a frequency-point frequency response of the simulated overall matrix under a preset simulation frequency, so as to obtain a simulation frequency response curve of the surface acoustic wave device. By means of the present invention, a six-node quadrilateral unit is used in unit matrix calculation, thereby reducing the dimensions of a unit matrix, and improving the simulation calculation efficiency.

Classes IPC  ?

  • G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]

99.

SIMULATION METHOD AND SYSTEM FOR REDUCING CASCADING ERRORS OF ELEMENT MATRIX, AND RELATED DEVICE

      
Numéro d'application CN2023132570
Numéro de publication 2024/120164
Statut Délivré - en vigueur
Date de dépôt 2023-11-20
Date de publication 2024-06-13
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Zhu, Yuquan
  • Guan, Peng
  • Yang, Ruizhi
  • Hu, Jinzhao
  • Yuan, Junping
  • Guo, Jiashuai

Abrégé

The present invention is applicable to the technical field of electromechanical coupling of piezoelectric materials. Provided are a simulation method and system for reducing cascading errors of an element matrix, and a related device. The simulation method comprises: acquiring a geometric structure of a surface acoustic wave device, and dividing the surface acoustic wave device into a plurality of basic structures according to the geometric structure; using a finite element method to perform grid division on the basic structures to obtain simulation element matrices, and using Schur complement operation to eliminate the internal degrees of freedom of the simulation element matrices, so as to obtain simulation complement operation element matrices; and splicing and cascading different simulation complement operation element matrices obtained from the basic structures, so as to obtain an overall simulation matrix, and calculating a frequency point frequency response of the overall simulation matrix at a preset simulation frequency, so as to obtain a simulation frequency response curve of the surface acoustic wave device. In the present invention, the degree of freedom of an original nine-node Lagrange element is eliminated by means of Schur complement operation, thereby avoiding the problem of node loss caused by the replacement of an eight-node serendipity element, and thus realizing simulation calculation without precision loss.

Classes IPC  ?

  • G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]

100.

RC OSCILLATOR CIRCUIT

      
Numéro d'application CN2023132791
Numéro de publication 2024/120173
Statut Délivré - en vigueur
Date de dépôt 2023-11-21
Date de publication 2024-06-13
Propriétaire LANSUS TECHNOLOGIES INC. (Chine)
Inventeur(s)
  • Li, Penghao
  • Ren, Xiaojiao
  • Guo, Jiashuai

Abrégé

The present invention provides an RC oscillator circuit, comprising a first set of inverters, an RC charging/discharging circuit, a delay pulse generating circuit, an enable controller, and a second set of inverters. The RC charging/discharging circuit comprises a first field effect transistor, a second field effect transistor, a first resistor, a first capacitor, a third field effect transistor, a fourth field effect transistor, and a Schmitt trigger. According to the RC oscillator circuit in the present invention, the power consumption of the RC oscillator circuit can be reduced, and there is no need to additionally add any dead state recovery circuit.

Classes IPC  ?

  • H03K 3/012 - Modifications du générateur pour améliorer le temps de réponse ou pour diminuer la consommation d'énergie
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