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2025
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Invention
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Machine learning deployment platform.
An inference server is capable of receiving a plurality of... |
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Invention
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3d integrated circuit with enhanced debugging capability.
An integrated circuit includes a plura... |
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Invention
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Firewalling communication ports in a multi-port system.
Handling port resets in a multi-port sys... |
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Invention
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Multiple partitions in a data processing array.
An apparatus includes a data processing array ha... |
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Invention
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Host polling of a network adapter.
Embodiments herein describe a host that polls a network adapt... |
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Invention
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Expert load balancing in transformer models. In response to one or more conditions, a processing ... |
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Invention
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Tamper sensor for 3-dimensional die stack.
An integrated circuit die stack and method thereof ar... |
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Invention
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Dynamically pooled allocations of memory buffers on spatial compute architectures. Dynamically po... |
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Invention
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Dispatch for a configurable data-flow compute array and data-parallel compute units. A command pr... |
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Invention
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Security ring for integrated circuits. Embodiments herein describe a security ring for integrated... |
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Invention
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Multi die configurable clock networks. An electronic device includes a plurality of integrated ci... |
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Invention
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Localized and relocatable software placement and noc-based access to memory controllers.
An inte... |
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Invention
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Unaligned load and store in a core. Embodiments herein describe storing unaligned data structures... |
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Invention
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Decoupling processing and interface clocks in an ipu. Embodiments herein describe a hardware acce... |
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Invention
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Edge coupler beam deflection system. embodiments herein describe a system including a first optic... |
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Invention
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Acceleration unit configured for multi- dimensional block-scaled matrices. To perform matrix mult... |
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Invention
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System-level data compression scheme. An implementation includes an integrated circuit, a network... |
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2024
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Invention
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Transmission and processing of data in parallel systems.
Systems and methods for transmitting an... |
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Invention
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Dynamically pooled allocations of memory buffers on spatial compute architectures.
Dynamically p... |
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Invention
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Memory circuit with bit line clamps.
A memory circuit is disclosed. The memory circuit includes ... |
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Invention
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Secure readback from configuration memory.
Multiple semiconductor dice are disposed on a silicon... |
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Invention
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Interposer with an integrated optical waveguide.
Disclosed herein are an interposer, an integrat... |
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Invention
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Redundant data storage using incremental error detection with non-zero seeds.
Redundant data sto... |
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Invention
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Security ring for integrated circuits.
Embodiments herein describe a security ring for integrate... |
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Invention
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Multi die configurable clock networks.
An electronic device includes a plurality of integrated c... |
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Invention
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Oversampled channelizer circuitry having time-varying filter coefficients.
A signal processing s... |
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Invention
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Systems and methods for providing power integrity to functional circuitry of a semiconductor devi... |
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Invention
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Generating data movement networks for machine learning models.
Implementing a data movement netw... |
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Invention
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Unaligned load and store in a core.
Embodiments herein describe storing unaligned data structure... |
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|
Invention
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Decoupling processing and interface clocks in an ipu.
Embodiments herein describe a hardware acc... |
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Invention
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Dma strategies for aie control and configuration.
Embodiments herein describe using DMA circuitr... |
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Invention
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Edge coupler beam deflection system.
Embodiments herein describe a system including a first opti... |
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Invention
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Secure solutions for resource-restrictions on integrated circuits.
Embodiments herein describe s... |
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Invention
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Programmable congestion monitoring and/or control.
Described herein are systems and methods for ... |
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Invention
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Method for bypassing subsequent lookups in packet processing pipelines.
Systems and methods for ... |
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Invention
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Data packing for power and area-efficient memory structures and performance-efficient decoding of... |
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Invention
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Acceleration unit configured for multi- dimensional block-scaled matrices.
To perform matrix mul... |
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Invention
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Pulse generation circuitry.
Examples herein describe pulse generation circuitry. The pulse gener... |
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Invention
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Emulating a circuit design in communication with a peripheral.
Emulating a circuit design in com... |
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Invention
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Deterministic built-in self-test.
Embodiments herein describe a computer architecture including ... |
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Invention
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Methodology to achieve transaction redundancy in memory constrained devices.
Embodiments herein ... |
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Invention
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Memory lifecycle state sensors.
Examples herein describe memory lifecycle state sensors. A memor... |
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Invention
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3d splintered physically unclonable function (3d-spuf).
Embodiments herein describe a 3D splinte... |
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Invention
|
System-level data compression scheme.
An implementation includes an integrated circuit, a networ... |
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Invention
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Cram validation using an external device.
Embodiments herein describe CRAM validation using an e... |
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Invention
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Network-on-chip having an integrated cache controller circuitry.
An integrated circuit device in... |
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Invention
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On-site updating of machine learning models and machine learning models incorporating hardware an... |
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2021
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Invention
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Neural network architecture with high bandwidth memory (hbm). A system includes a high bandwidth ... |
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2020
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P/S
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System on module, namely, integrated board-level circuits that integrate a system function in a s... |
|
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P/S
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System on module, namely, a board-level circuit that
integrates a system function in a single mo... |
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2019
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P/S
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Downloadable computer software platform for the design, programming and operation of integrated c... |
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P/S
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Downloadable computer software platform for the design,
programming and operation of integrated ... |
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P/S
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Integrated circuits and semiconductors; computer accelerator
boards; computer accelerator cards;... |
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P/S
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Integrated circuits; integrated circuits in the nature of
integrated multi-core heterogeneous co... |
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2018
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P/S
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Integrated circuits and semiconductors; computer accelerator boards; computer accelerator cards; ... |
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P/S
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Integrated circuits; integrated circuits in the nature of integrated multi-core heterogeneous com... |
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P/S
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Computer accelerator boards; computer accelerator cards; computing memory modules; computer add-i... |
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2017
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P/S
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Computer software for implementing a network protocol stack, not for use in testing website funct... |
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P/S
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Computer software and hardware for monitoring and securing network data, enable multiple services... |
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P/S
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Computer hardware, wide-area computer networks hardware, peer-to-peer computer networks hardware,... |
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2015
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P/S
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Semiconductors; integrated circuits; programmable logic integrated circuits; field programmable g... |
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P/S
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Technical consultation in the field of engineering of semiconductors, integrated circuits, progra... |
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P/S
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Computer software for design, programming, and operation of integrated circuits |
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2012
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P/S
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Computer software systems for packet recordation or storage, time-stamping, time synchronization,... |
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2011
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P/S
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Computer hardware, namely, integrated circuits; integrated circuit, namely, field programmable ga... |
|
|
P/S
|
Computer hardware, namely, integrated circuits; integrated
circuit, namely, field programmable g... |
|
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P/S
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Computer software for design, programming, and operation of programmable gate arrays. |
|
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P/S
|
Integrated circuits, namely, field programmable gate arrays;
computer software for design, progr... |
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2010
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P/S
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Computer software for implementing network communications, computer software used to accelerate n... |
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P/S
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Computer software; computer software which implements a network protocol stack. |
|
|
P/S
|
Integrated circuits, namely field programmable gate arrays; computer software for design, program... |
|
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P/S
|
Computer software for design, programming, and operation of programmable gate arrays |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays [ ; computer software for design, pro... |
|
|
P/S
|
Integrated circuits, namely field-programmable gate arrays. |
|
|
P/S
|
Integrated circuits, namely field programmable gate arrays;
computer software for design, progra... |
|
|
P/S
|
Integrated circuits; field programmable gate arrays; computer software for the design, programmin... |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays |
|
|
P/S
|
Integrated circuits; field programmable gate arrays;
computer software for the design, programmi... |
|
|
P/S
|
Integrated circuits; Integrated circuits in the nature of field programmable gate arrays |
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2009
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P/S
|
Data processing equipment and computers; computer hardware and firmware; computer software; compu... |
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2007
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P/S
|
Computer hardware, namely, integrated circuits, semiconductors, computer cables, printed circuit ... |
|
|
P/S
|
Computer software which implements a network protocol stack not for use in testing website functi... |
|
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P/S
|
Computer software, namely, software for use in design and programming in the field of integrated ... |
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2006
|
P/S
|
Design of computer hardware, integrated circuits, communications hardware and software. |
