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2026
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Invention
|
Embedded configurable engine.
Embodiments herein describe a configurable engine that is embedded... |
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Invention
|
Clock modulation schemes in integrated circuits.
An integrated circuit (IC) includes a clock mod... |
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Invention
|
Host endpoint adaptive compute composability.
Embodiments herein describe a processor system tha... |
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Invention
|
Chip package with integrated embedded off-die inductors.
A chip package and method for fabricati... |
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Invention
|
Optimal memory configurations in a silicon interposer for high-speed dram. The examples describe ... |
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|
Invention
|
Weight sparsity in data processing engines.
Examples herein describe techniques for reducing the... |
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Invention
|
Non linearity implementations using luts. Embodiments herein describe using LUTs to map an input ... |
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Invention
|
Co-packaged photonics integrated circuit (ic) assembly and method for fabricating the same. A pho... |
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Invention
|
Interception and prevention of malicious actions of artificial intelligence models. A trained mac... |
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2025
|
Invention
|
Quantized operations in neural network models implementing underutilized hardware features. A pro... |
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Invention
|
Protocol enhancements for low latency applications. Disclosed devices, systems, and methods may e... |
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Invention
|
Data format scaling and conversion techniques. A flexible microscaling (MX) approach allows for t... |
|
|
Invention
|
Direct alignment structures on silicon to enable passive surface coupling.
Plug and photonics IC... |
|
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Invention
|
Co-packaged photonic integrated circuit (ic) assembly and method for fabricating the same.
A pho... |
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Invention
|
Lane alignment for symbol multiplexed wired communication systems. Alignment detection circuitry ... |
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Invention
|
Supporting multiple applications in data processing engine columns.
A hardware accelerator is de... |
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Invention
|
Linear attention in vision transformer with quadratic taylor expansion.
An apparatus and method ... |
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Invention
|
Optimal memory configurations in a silicon interposer for high-speed dram.
The examples describe... |
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Invention
|
Automatic pruning mask for large language models with balanced weight and activation.
An apparat... |
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Invention
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Detecting and correcting single event upsets in static random-access memory cells.
A memory circ... |
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Invention
|
Direct broadcasting of calculated sums between accumulators in a multi-core spatial architecture.... |
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Invention
|
Automated generation of coverage data for circuit designs using machine learning.
Automated veri... |
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|
Invention
|
Extensible data format conversion techniques.
A processing system includes a processor to access... |
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|
Invention
|
Non linearity implementations using luts.
Embodiments herein describe using LUTs to map an input... |
|
|
Invention
|
Process variation detection and adaptive voltage scaling.
A system includes a plurality of ring ... |
|
|
Invention
|
Interception and prevention of malicious actions of artificial intelligence models.
A trained ma... |
|
|
Invention
|
Selective throttling based on datatype.
Embodiments describe throttling cores in an IC based on ... |
|
|
Invention
|
Light incremental flow for quality-of-result resilience.
Implementing a circuit design for a tar... |
|
|
Invention
|
Replacing multipliers with luts in an ai engine.
Embodiments herein describe an artificial intel... |
|
|
Invention
|
High-speed and low modulation loss multi-ring modulator.
High-speed and low modulation loss mult... |
|
|
Invention
|
Adaptable streaming interconnect.
A system-on-chip (SoC) includes a request initiator device, a ... |
|
|
Invention
|
Execution of vector-matrix instructions in an ai engine.
Embodiments herein describe a system in... |
|
|
Invention
|
Ai engine with multiplier supporting a superset of data types.
Embodiments herein describe an ar... |
|
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Invention
|
Parallel execution of matrix multiplications and vector operations in an ai engine.
Embodiments ... |
|
2024
|
Invention
|
Quantized operations in neural network models implementing underutilized hardware features.
A pr... |
|
|
Invention
|
Model level debugging of machine learning designs on neural processing units.
Model level debugg... |
|
|
Invention
|
Devices, systems, and methods to optimize power management within in die-to-die interconnects.
D... |
|
|
Invention
|
Protocol enhancements for low latency applications.
Disclosed devices, systems, and methods may ... |
|
|
Invention
|
Boolean matrix factorization for lut-based neural networks.
Embodiments herein relate to applyin... |
|
|
Invention
|
Data format scaling and conversion techniques.
A flexible microscaling (MX) approach allows for ... |
|
|
Invention
|
Adaptive quantization and compression for variable-length collective communication.
A processing... |
|
|
Invention
|
High-level synthesis generation of arbitrary multiplexer logic.
High-level synthesis generation ... |
|
|
Invention
|
Automatic calibration of wavelength division multiplexing optical micro-ring modulators.
Calibra... |
|
|
Invention
|
Transform block floating point values to other block floating point formats.
Embodiments herein ... |
|
|
Invention
|
Gaussian simultaneous localization and mapping.
A processing system is configured to generate a ... |
|
|
Invention
|
Voltage-dependent dynamic read/write assist.
An adaptive voltage assist circuit includes a volta... |
|
|
Invention
|
Inline configuration processor.
An integrated circuit (IC) device includes functional circuitry ... |
|
2022
|
Invention
|
Event-based debug, trace, and profile in device with data processing engine array. A device may i... |
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2021
|
Invention
|
Prediction of logic optimization algorithms using machine learning. Embodiments herein describe o... |
|
2020
|
Invention
|
Pruning filters from convolutional neural networks. Levels of cross-correlation between pairs of ... |
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|
P/S
|
System on module, namely, integrated board-level circuits that integrate a system function in a s... |
|
|
P/S
|
System on module, namely, a board-level circuit that
integrates a system function in a single mo... |
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2019
|
P/S
|
Downloadable computer software platform for the design, programming and operation of integrated c... |
|
|
P/S
|
Downloadable computer software platform for the design,
programming and operation of integrated ... |
|
|
P/S
|
Integrated circuits and semiconductors; computer accelerator
boards; computer accelerator cards;... |
|
|
P/S
|
Integrated circuits; integrated circuits in the nature of
integrated multi-core heterogeneous co... |
|
2018
|
P/S
|
Downloadable computer software and firmware for accelerating artificial intelligence computations... |
|
|
P/S
|
Integrated circuits and semiconductors; computer accelerator boards; computer accelerator cards; ... |
|
|
P/S
|
Integrated circuits; integrated circuits in the nature of integrated multi-core heterogeneous com... |
|
|
P/S
|
Computer accelerator boards; computer accelerator cards; computing memory modules; computer add-i... |
|
2017
|
P/S
|
Computer software for implementing a network protocol stack, not for use in testing website funct... |
|
|
P/S
|
Computer software and hardware for monitoring and securing network data, enable multiple services... |
|
|
P/S
|
Computer hardware, wide-area computer networks hardware, peer-to-peer computer networks hardware,... |
|
2015
|
P/S
|
Semiconductors; integrated circuits; programmable logic integrated circuits; field programmable g... |
|
|
P/S
|
Technical consultation in the field of engineering of semiconductors, integrated circuits, progra... |
|
|
P/S
|
Computer software for design, programming, and operation of integrated circuits |
|
2012
|
P/S
|
Computer software systems for packet recordation or storage, time-stamping, time synchronization,... |
|
2011
|
P/S
|
Computer hardware, namely, integrated circuits; integrated circuit, namely, field programmable ga... |
|
|
P/S
|
Computer hardware, namely, integrated circuits; integrated
circuit, namely, field programmable g... |
|
|
P/S
|
Computer software for design, programming, and operation of programmable gate arrays. |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays;
computer software for design, progr... |
|
2010
|
P/S
|
Computer software for implementing network communications, computer software used to accelerate n... |
|
|
P/S
|
Computer software; computer software which implements a network protocol stack. |
|
|
P/S
|
Integrated circuits, namely field programmable gate arrays; computer software for design, program... |
|
|
P/S
|
Computer software for design, programming, and operation of programmable gate arrays |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays [ ; computer software for design, pro... |
|
|
P/S
|
Integrated circuits, namely field-programmable gate arrays. |
|
|
P/S
|
Integrated circuits, namely field programmable gate arrays;
computer software for design, progra... |
|
|
P/S
|
Integrated circuits; field programmable gate arrays; computer software for the design, programmin... |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays |
|
|
P/S
|
Integrated circuits; field programmable gate arrays;
computer software for the design, programmi... |
|
|
P/S
|
Integrated circuits; Integrated circuits in the nature of field programmable gate arrays |
|
2009
|
P/S
|
Data processing equipment and computers; computer hardware and firmware; computer software; compu... |
|
2007
|
P/S
|
Computer hardware, namely, integrated circuits, semiconductors, computer cables, printed circuit ... |
|
|
P/S
|
Computer software which implements a network protocol stack not for use in testing website functi... |
|
|
P/S
|
Computer software, namely, software for use in design and programming in the field of integrated ... |
