|
2024
|
Invention
|
Iic with adaptive chip-to-chip interface to support different chip-to-chip protocols.
Embodiment... |
|
|
Invention
|
Interposer stitch through a top chiplet. Embodiments herein describe devices that indude an inter... |
|
|
Invention
|
Multi-host and multi-client direct memory access system having a read scheduler. A direct memory ... |
|
|
Invention
|
High-bandwidth three-dimensional (3d) die stack. Examples herein describe techniques for producin... |
|
|
Invention
|
Tiled compute and programmable logic array. Examples herein describe a three-dimensional (3D) die... |
|
|
Invention
|
Building multi-die fpgas using chip-on-wafer technology. Embodiments herein describe techniques t... |
|
|
Invention
|
Methods and apparatuses for wavelength locking for optical wavelength division multiplexed micro-... |
|
|
Invention
|
Methods to extend noc interconnect across multiple dice in 3d. Embodiments herein describe techni... |
|
|
Invention
|
Inline configuration processor. An integrated circuit (IC) device includes functional circuitry a... |
|
|
Invention
|
Network interface device.
A network interface device comprises a streaming data processing path ... |
|
|
Invention
|
Hardware-based accelerator signaling. A processor [102] employs a hardware signal monitor [110] t... |
|
|
Invention
|
Aligning multi-chip devices. Embodiments herein describe arranging TX and RX circuitry in iCs suc... |
|
2023
|
Invention
|
Building multi-die fpgas using chip-on-wafer technology.
Embodiments herein describe techniques ... |
|
|
Invention
|
8-t sram bitcell for fpga programming.
A memory device includes a first bit cell comprising a fi... |
|
|
Invention
|
Synthesis of simulation-directed statements.
A method, system, and circuit arrangement involve s... |
|
|
Invention
|
Performance evaluator for a heterogenous hardware platform.
Performance evaluation of a heteroge... |
|
|
Invention
|
High-level synthesis of designs using loop-aware execution information.
High-level synthesis of ... |
|
|
Invention
|
Multi-die physically unclonable function entropy source.
Disclosed circuit arrangements include ... |
|
|
Invention
|
Process and temperature tracking on-chip supply regulation for low jitter applications.
On chip ... |
|
|
Invention
|
Methods and apparatuses for wavelength locking for optical wavelength divison muliplexed micro-ri... |
|
|
Invention
|
Self-authentication of data stored off-chip.
Methods and circuit arrangements for self-authentic... |
|
|
Invention
|
Methods to extend noc interconnect across multiple dice in 3d.
Embodiments herein describe techn... |
|
|
Invention
|
Smart interrupt controller.
A smart interrupt controller (SIC) routs an interrupt to a specific ... |
|
|
Invention
|
On-chip (in-system) triggering of logic analyzer.
An integrated circuit (IC) device includes fun... |
|
|
Invention
|
Global placement of circuit designs using a calibrated simple timer.
A design tool calibrates cu... |
|
|
Invention
|
Methods and apparatuses for maximizing output modulation amplitude for optical wavelength divisio... |
|
|
Invention
|
Inline configuration processor.
An integrated circuit (IC) device includes functional circuitry ... |
|
|
Invention
|
Driver circuitry with reduced intersymbol interference jitter.
Driver circuitry for memory contr... |
|
|
Invention
|
Adding soft logic to flush a pipeline and reduce current ramp.
An integrated circuit (IC) device... |
|
|
Invention
|
Self-reliant smartnics.
Embodiments herein describe a self-reliant Network Interface Controller ... |
|
|
Invention
|
Memory bandwidth through vertical connections.
Embodiments herein describe a memory controller (... |
|
|
Invention
|
Data processing array event trace and profiling using processor system executed kernels.
Within ... |
|
|
Invention
|
Hardware event trace windowing for a data processing array.
Hardware event trace windowing for a... |
|
|
Invention
|
Ring modulators with low-loss and large free spectral range (fsr) on a silicon-on-insulator (soi)... |
|
|
Invention
|
Boosted driver circuitry of a low voltage supply memory controller.
A memory controller includes... |
|
|
Invention
|
Prediction of routing congestion.
A congestion prediction machine learning model is trained to g... |
|
|
Invention
|
Dfxnoc - a multi-protocol, multi-cast, and multi-root network-on-chip with dynamic resource alloc... |
|
|
Invention
|
Data processing array event trace customization, offload, and analysis.
Event trace includes imp... |
|
|
Invention
|
Dynamic memory allocation in probing signal states.
Disclosed methods and systems include debug ... |
|
|
Invention
|
Cascaded reference based thin-oxide only n-well steering circuit for contention solution in multi... |
|
|
Invention
|
3d stacked device having improved data flow.
A 3D device includes a first semiconductor chip and... |
|
|
Invention
|
Aligning multi-chip devices.
Embodiments herein describe arranging TX and RX circuitry in ICs su... |
|
|
Invention
|
Cross-coupled capacitive elements in highspeed dac.
A digital-to analog converter (DAC) includes... |
|
|
Invention
|
Passive intermodulation mitigation coefficient determination based on received data.
Passive int... |
|
|
Invention
|
Low latency phase alignment for parallel data paths.
Receiver circuitry for mitigating effects a... |
|
|
Invention
|
Software defined device variants.
Embodiments herein describe assigning integrated circuits with... |
|
|
Invention
|
Descriptor cache eviction for multi-queue direct memory access.
Evicting queues from a memory of... |
|
|
Invention
|
Variable buffer size descriptor fetching for a multi-queue direct memory access system.
Descript... |
|
2021
|
Invention
|
Smart cache implementation for image warping. A smart cache implementation for image warping is p... |
|
|
Invention
|
Shared depthwise convolution. A digital processing engine is configured to receive input data fro... |
|
2020
|
P/S
|
System on module, namely, integrated board-level circuits that integrate a system function in a s... |
|
|
P/S
|
System on module, namely, a board-level circuit that
integrates a system function in a single mo... |
|
2019
|
P/S
|
Downloadable computer software platform for the design, programming and operation of integrated c... |
|
|
P/S
|
Downloadable computer software platform for the design,
programming and operation of integrated ... |
|
|
P/S
|
Integrated circuits and semiconductors; computer accelerator
boards; computer accelerator cards;... |
|
|
P/S
|
Integrated circuits; integrated circuits in the nature of
integrated multi-core heterogeneous co... |
|
2018
|
P/S
|
Integrated circuits and semiconductors; computer accelerator boards; computer accelerator cards; ... |
|
|
P/S
|
Integrated circuits; integrated circuits in the nature of integrated multi-core heterogeneous com... |
|
|
P/S
|
Computer accelerator boards; computer accelerator cards; computing memory modules; computer add-i... |
|
2017
|
P/S
|
Computer software for implementing a network protocol stack, not for use in testing website funct... |
|
|
P/S
|
Cards with integrated circuits; Computer network adapters; Computer network interface devices; Et... |
|
|
P/S
|
Computer software and hardware for monitoring and securing network data, enable multiple services... |
|
|
P/S
|
Computer hardware, wide-area computer networks hardware, peer-to-peer computer networks hardware,... |
|
|
P/S
|
Computer software for providing active protection for network servers and network adapters using ... |
|
2015
|
P/S
|
Semiconductors; integrated circuits; programmable logic integrated circuits; field programmable g... |
|
|
P/S
|
Technical consultation in the field of engineering of semiconductors, integrated circuits, progra... |
|
|
P/S
|
Computer software for design, programming, and operation of integrated circuits |
|
|
P/S
|
Computer software for design, programming, and operation of integrated circuits. |
|
|
P/S
|
Computer software for design, programming, and operation of
integrated circuits. |
|
2012
|
P/S
|
Computer software systems for packet recordation or storage, time-stamping, time synchronization,... |
|
2011
|
P/S
|
Computer hardware, namely, integrated circuits; integrated circuit, namely, field programmable ga... |
|
|
P/S
|
Computer hardware, namely, integrated circuits; integrated
circuit, namely, field programmable g... |
|
|
P/S
|
Computer software for design, programming, and operation of programmable gate arrays. |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays;
computer software for design, progr... |
|
2010
|
P/S
|
Computer software for implementing network communications, computer software used to accelerate n... |
|
|
P/S
|
Computer software; computer software which implements a network protocol stack. |
|
|
P/S
|
Integrated circuits, namely field programmable gate arrays; computer software for design, program... |
|
|
P/S
|
Computer software for design, programming, and operation of programmable gate arrays |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays [ ; computer software for design, pro... |
|
|
P/S
|
Integrated circuits, namely field-programmable gate arrays. |
|
|
P/S
|
Integrated circuits, namely field programmable gate arrays;
computer software for design, progra... |
|
|
P/S
|
Integrated circuits; field programmable gate arrays; computer software for the design, programmin... |
|
|
P/S
|
Integrated circuits, namely, field programmable gate arrays |
|
|
P/S
|
Integrated circuits; field programmable gate arrays;
computer software for the design, programmi... |
|
|
P/S
|
Integrated circuits; Integrated circuits in the nature of field programmable gate arrays |
|
2009
|
P/S
|
Data processing equipment and computers; computer hardware and firmware; computer software; compu... |
|
2007
|
P/S
|
Computer hardware, namely, integrated circuits, semiconductors, computer cables, printed circuit ... |
|
|
P/S
|
Computer software which implements a network protocol stack not for use in testing website functi... |
