|
2026
|
P/S
|
Custom manufacturing of chips [integrated circuits] for others; Custom manufacture of semiconduct... |
|
|
P/S
|
Integrated circuits; semiconductors; system-on-chip devices;
microprocessors; processors [centra... |
|
|
P/S
|
Integrated circuits; semiconductors; system-on-chip devices; microprocessors; processors [central... |
|
|
P/S
|
Downloadable computer software for computer system and application development, deployment and ma... |
|
|
P/S
|
Computer software; computer software development tools; computer software development tools in th... |
|
|
P/S
|
Development of voluntary standards for the interoperability and security of computer instruction ... |
|
2025
|
Invention
|
Methods and apparatus for image processing.
Image data includes a plurality of data values arran... |
|
|
P/S
|
Integrated circuits; semiconductors; system-on-chip devices; microprocessors; processors, namely,... |
|
|
P/S
|
Integrated circuits; semiconductors; system-on-chip devices; microprocessors; processors [ centra... |
|
|
Invention
|
Graphics processing apparatus and method for performance metric sampling.
A graphics processing ... |
|
|
P/S
|
Integrated circuits; Semiconductors; System-on-chips; Microprocessors; Computer central processin... |
|
|
Invention
|
Capacitor on integrated circuit package substrate. An integrated circuit assembly comprises an in... |
|
|
P/S
|
Integrated circuits; semiconductors; electronic circuits for system- on-chip devices; microproces... |
|
|
P/S
|
Integrated circuits; semiconductors; electronic circuits for
system- on-chip devices; microproce... |
|
|
Invention
|
Data handling. An apparatus comprising storage, an execution unit and a handling unit. The handli... |
|
|
Invention
|
Command messages for hardware accelerators. An apparatus comprising processing circuitry configur... |
|
|
Invention
|
Dynamic frequency adjustment in multi-chiplet arrangement. The present disclosure relates general... |
|
|
Invention
|
Data transfer. There is provided an apparatus comprising bridge circuitry to couple processing ci... |
|
|
Invention
|
Internal communication link. An apparatus comprises bridge circuitry configured to bridge between... |
|
|
Invention
|
Bridge circuitry. An apparatus comprises: an external port controller to control communication, v... |
|
|
Invention
|
System register lockdown control register. An apparatus comprises processing circuitry configured... |
|
|
Invention
|
Enhanced information processing.
A method performed by an information processing apparatus is pr... |
|
|
P/S
|
Computer hardware and recorded computer software, namely, computer subsystems featuring standardi... |
|
|
P/S
|
Computer hardware and recorded computer software, namely, computer subsystems comprised of standa... |
|
|
P/S
|
Computer software development tools in the field of artificial intelligence; computer software an... |
|
|
Invention
|
Write burst gathering across multiple streams.
Write gathering circuitry of a data processing ne... |
|
|
Invention
|
Internal communication link.
An apparatus comprises bridge circuitry configured to bridge betwee... |
|
|
Invention
|
Data transfer.
There is provided an apparatus comprising bridge circuitry to couple processing c... |
|
|
Invention
|
Dct mechanism for the multi-chip systems.
Direct Cache Transfer is enabled in a multi-chip data ... |
|
|
Invention
|
Data handling.
An apparatus comprising storage, an execution unit and a handling unit. The handl... |
|
|
Invention
|
Learned dilation in a convolutional neural network.
A training input tensor and a ground truth o... |
|
|
Invention
|
Updating training data.
There is provided an apparatus comprising training storage circuitry con... |
|
2024
|
Invention
|
Graphics processors.
Disclosed is a graphics processor that comprises a plurality of processing ... |
|
|
Invention
|
Quantized winograd convolution.
A method is described for processing a neural network. The metho... |
|
|
Invention
|
Delay circuitry.
There is described delay circuitry including: a pulse generator to generate a p... |
|
|
Invention
|
Prefetching to retrieve content from a memory system. There are provided apparatuses, methods, sy... |
|
|
Invention
|
Chiplet integrated circuit (ic) having active and inactive interface circuitry.
Briefly, example... |
|
|
Invention
|
Chiplet integrated circuit (ic) having central and wing chiplets.
Briefly, example apparatuses, ... |
|
|
Invention
|
Alternative prediction storage.
An apparatus includes a branch predictor to generate a predictio... |
|
|
Invention
|
Skipping predictions on a flush.
An apparatus comprises branch prediction circuitry to generate ... |
|
|
Invention
|
Multi-taken prediction entries for prediction resumption.
An apparatus comprising prediction sto... |
|
|
Invention
|
Capacitor on integrated circuit package substrate.
An integrated circuit assembly comprises an i... |
|
|
Invention
|
Address range identification.
There is provided an apparatus comprising storage circuitry to sto... |
|
|
Invention
|
Prediction circuitry training.
An apparatus comprises training storage circuitry to store one or... |
|
|
Invention
|
Method and apparatus for cross-die reset control.
A reset generation manager (RGM) of a first di... |
|
|
Invention
|
Storage circuitry for read and write operations.
Storage circuitry devices, systems, and methods... |
|
|
Invention
|
Hardware counters.
An apparatus comprises a plurality of hardware counters each corresponding to... |
|
|
Invention
|
Command messages for hardware accelerators.
An apparatus comprising processing circuitry configu... |
|
|
Invention
|
Efficient neural frame rate upsampling pipeline.
An interpolated output frame may be generated b... |
|
|
Invention
|
Dynamic atrous kernel predicting network.
Image signal values of an image are received as an inp... |
|
|
Invention
|
Voltage stabilization with on-device metal capacitor.
An integrated circuit assembly comprises a... |
|
|
Invention
|
Pipeline stage allocation.
An apparatus comprises processing circuitry comprising a plurality of... |
|
|
Invention
|
Updating training data.
There is provided an apparatus, a system, a chip containing product, a m... |
|
|
Invention
|
Tensor processing circuitry.
There is provided tensor processing circuitry comprising a pluralit... |
|
|
Invention
|
Processor, host processor and method of operating a processor.
A method of operating a processor... |
|
|
Invention
|
Dynamic frequency adjustment in multi-chiplet arrangement.
The present disclosure relates genera... |
|
|
Invention
|
Technique for managing a history storage used for prediction.
An apparatus has history storage f... |
|
|
Invention
|
User state monitoring.
A computing device and a method of operating a computing device, implemen... |
|
|
Invention
|
Systems, methods, and devices of design-for-test circuitry.
A circuit for design-for-test (DFT)-... |
|
|
Invention
|
Migration of confidential virtual machines.
A data processing apparatus is provided in which ini... |
|
|
Invention
|
Storage circuit.
Storage circuitry including a bitcell array including a plurality of bitcells a... |
|
2023
|
Invention
|
Stack pointer switch validity checking.
Processing circuitry 16 performs a stack pointer switch ... |
|
|
Invention
|
Exception control.
Exception control circuitry (40) controls taking of exception by processing c... |
|
|
Invention
|
Doorbell physical interrupt control.
Doorbell physical interrupt control circuitry (20) comprise... |
