|
2025
|
P/S
|
Semiconductors; computer memory chips; wafers, namely, silicon wafers and semiconductor wafers; a... |
|
|
P/S
|
Custom manufacture of semiconductors, memory chips, wafers and integrated circuits Semiconductors... |
|
|
Invention
|
Image sensor structure.
An image sensor structure and methods of forming the same are provided. ... |
|
|
Invention
|
Passive thermal control layer for integrated device.
Some embodiments relate to an integrated de... |
|
|
Invention
|
Isolation structures for multi-gate devices.
A semiconductor structure according to the present ... |
|
|
Invention
|
Epitaxial source/drain configurations for multigate devices.
A semiconductor structure includes ... |
|
|
Invention
|
Back-end active device.
Semiconductor structures and formation processes thereof are provided. A... |
|
|
Invention
|
Packages with dtcs on other device dies and methods of forming the same.
A method includes formi... |
|
|
Invention
|
Backside deep trench isolation (bdti) structure for cmos image sensor.
In some embodiments, the ... |
|
|
Invention
|
Image sensor and method of manufacturing image sensor.
The present disclosure provides an image ... |
|
|
Invention
|
Semiconductor device and method of manufacturing the same.
A semiconductor device and method of ... |
|
|
Invention
|
Back-end-of-line selector for memory device.
The present disclosure, in some embodiments, relate... |
|
|
Invention
|
Method of forming semiconductor structure.
A method of manufacturing a semiconductor structure i... |
|
|
Invention
|
Work-function layers in the gates of pfets.
A method includes forming a dummy gate stack over a ... |
|
|
Invention
|
Method for manufacturing semiconductor structure with material in monocrystalline phase.
A metho... |
|
|
Invention
|
Processes for removing spikes from gates.
A method includes forming a dummy gate electrode on a ... |
|
|
Invention
|
Nanostructure field-effect transistor device and method of forming.
A method of forming a semico... |
|
|
Invention
|
Stacked multi-gate device with front-and-back interconnection and methods for forming the same.
... |
|
|
Invention
|
Semiconductor structures.
A method of forming a semiconductor structure includes the following o... |
|
|
Invention
|
Apparatus and bonding process for wafer bonding.
A method includes performing a cleaning process... |
|
|
Invention
|
Metal lines of hybrid heights.
The present disclosure provides a semiconductor device. The semic... |
|
|
Invention
|
Deposition method for semiconductor device.
A method includes depositing a first material on a s... |
|
|
Invention
|
Wafer singulation including multiple laser grooving.
A method includes performing a first plural... |
|
|
Invention
|
Stacking cmos structure.
A semiconductor structure includes a power rail, a first source/drain f... |
|
|
Invention
|
Memory device with improved anti-fuse read current.
A method of making a memory device includes ... |
|
|
Invention
|
Package with integrated voltage regulator and method forming the same.
A method of forming an in... |
|
|
Invention
|
Semiconductor package and method of manufacturing the same.
A semiconductor device includes: a s... |
|
|
Invention
|
Semiconductor package, method of bonding workpieces and method of manufacturing semiconductor pac... |
|
|
Invention
|
Semiconductor package and method.
A semiconductor package including a recessed stiffener ring an... |
|
|
Invention
|
Semiconductor structure with gate isolation layer and manufacturing method thereof.
A method inc... |
|
|
Invention
|
Photonic semiconductor package and method of forming the same.
A package includes an interposer;... |
|
|
Invention
|
High alignment tolerance edge coupler.
An edge coupler has a wide end, a narrow end, and a taper... |
|
|
Invention
|
Thermal structure for semiconductor package.
A package structure includes a high-power package a... |
|
|
Invention
|
High voltage device with boosted breakdown voltage.
An integrated circuit (IC) device comprises ... |
|
|
Invention
|
Trench-type beol memory cell.
An integrated chip includes a memory cell within a BEOL metal inte... |
|
|
Invention
|
Thermal dissipation in power ic using pyroelectric materials.
An electrocaloric heat dissipation... |
|
|
Invention
|
Manufacturing method of semiconductor structure and package structure having the same.
A semicon... |
|
|
Invention
|
Photonic semiconductor package and method of forming the same.
A package includes an interposer,... |
|
|
Invention
|
Polymer layers embedded with metal pads for heat dissipation.
An integrated circuit structure in... |
|
|
Invention
|
Semiconductor device with integrated metal-insulator-metal capacitors.
A method of forming a sem... |
|
|
Invention
|
Semiconductor device structure and methods of forming the same.
Embodiments of the present discl... |
|
|
Invention
|
Image sensor having a lateral photodetector structure.
The present disclosure relates to an imag... |
|
|
Invention
|
Micro-electromechanical systems (mems) device with outgas layer.
The present disclosure relates ... |
|
|
Invention
|
Integrated circuit package and method.
In an embodiment, a device includes: a package component ... |
|
|
Invention
|
Semiconductor device with doped region dielectric layer.
Semiconductor devices and methods of ma... |
|
|
Invention
|
Method of forming metal gate fin electrode structure by etching back metal fill.
Embodiments pro... |
|
|
P/S
|
Custom manufacture of semiconductors, memory chips, wafers and integrated circuits Product resear... |
|
2024
|
P/S
|
Semiconductors; computer memory chips; wafers, namely, silicon wafers and semiconductor wafers; i... |
|
|
Invention
|
Cfet device optimization by multiple cell height placement.
A structure includes a standard cell... |
|
|
Invention
|
Semiconductor structure and manufacturing method thereof.
A semiconductor structure and a manufa... |
|
|
Invention
|
Semiconductor structure and method of forming thereof.
A method includes a number of operations.... |
|
|
Invention
|
Hybrid-bonding stack including a processor die and multi-cache-level memory dies and methods of f... |
|
|
Invention
|
Package structure and manufacturing method thereof.
A package structure and a manufacturing meth... |
|
|
Invention
|
Semiconductor device structure and methods of forming the same.
A semiconductor device structure... |
|
2023
|
P/S
|
Custom manufacture of semiconductors, memory chips, wafers and integrated circuits. |
|
|
P/S
|
Custom manufacture of semiconductors, computer memory chips, multiprocessor memory chips, semicon... |
|
|
P/S
|
Custom manufacture of semiconductors, memory chips, wafers and integrated circuits |
|
2022
|
P/S
|
Semiconductors; computer memory chips, multiprocessor memory chips, semiconductor memory chips, s... |
|
|
P/S
|
Semiconductors; memory chips; semiconductor wafers; integrated circuits; telecommunication device... |
