- All sections
- G - Physics
- G06F - Electric digital data processing
- G06F 30/398 - Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
Patent holdings for IPC class G06F 30/398
Total number of patents in this class: 2145
10-year publication summary
4
|
8
|
44
|
162
|
374
|
390
|
354
|
391
|
273
|
124
|
2016 | 2017 | 2018 | 2019 | 2020 | 2021 | 2022 | 2023 | 2024 | 2025 |
Principal owners for this class
Owner |
All patents
|
This class
|
---|---|---|
Taiwan Semiconductor Manufacturing Company, Ltd. | 42222 |
538 |
Synopsys, Inc. | 2780 |
137 |
International Business Machines Corporation | 61123 |
135 |
Samsung Electronics Co., Ltd. | 144426 |
125 |
Cadence Design Systems, Inc. | 1769 |
96 |
ASML Netherlands B.V. | 7313 |
72 |
Siemens Industry Software Inc. | 1652 |
59 |
Intel Corporation | 46751 |
40 |
Changxin Memory Technologies, Inc. | 4927 |
37 |
Xilinx, Inc. | 4002 |
31 |
D2s, Inc. | 174 |
27 |
Texas Instruments Incorporated | 19482 |
18 |
Applied Materials, Inc. | 18433 |
17 |
TSMC Nanjing Company, Limited | 131 |
16 |
Realtek Semiconductor Corp. | 3274 |
14 |
Google LLC | 41903 |
14 |
Altera Corporation | 2206 |
13 |
ARM Limited | 4629 |
13 |
Celera, Inc. | 20 |
13 |
Advanced Micro Devices, Inc. | 5612 |
12 |
Other owners | 718 |